Hi All,

I have received a PCB with an FPGA connected to an external display, using a flat cable.
Now this solution comes with some unintended (but beautiful) harmonic peaks on the RF spectrum - yay, more fun for me....
Base frequency is 33MHz and I have a ton of harmonics reaching into a couple of hundred MHz...
The caveat is that I am not allowed to change the cabling solution, but I have to reduce the EMI emission "in some other way".

So, the obvious and crude way to do this would be shielding (it's in a plastic chassis, but I figure I could throw some metal film on the inside of the chassis).
However I consider this my hail-mary-pass; I would prefer to reduce emission at the source, perhaps using resistors/caps or ferrite beads on the communication lines. But unfortunately I have no real experience with this in regards to signal integrity.
Is there a good rule of thumb (or a good publication) for this?
Maybe some general advice about my endeavors, I should know off?
... or how would you go about this issue?

I have attached an image of the interconnect from the FPGA to the flatcable connector. As you can see, there isn't a ton of room for modification.
As a first draft, I would love a solution that can be implemented (read: hacked) onto an existing board, if possible

 

This article might help: https://www.maximintegrated.com/en/design/technical-documents/app-notes/3/3882.html

 

Hi Yaakov,
thanks for the links - I definitely check that out!

Cheers!

 

 

I assume you mean to reduce the radiated emissions of the cable, not to reduce the effect of external signals on it,

Do we have a number , dB and at what frequency you want to reduce the emissions by ?

The ferrite as @DickCappels suggests are good , especially if the data is uni direction , but the ferrite at the sending end,
or if you have a screened box, just at the box.

Another thing to look at , is a screened version of the ribbon,
you can test that by wrapping it in aluminium foil, with a ground wire along it, bonded at both ends to "gnd",

You could try just bunching the wires up into a round, as opposed to flat , this sometimes gains you a few dB.

Retro fitting Em filtering is always an impossible job,
this cable should have been routed with diff pairs , and / or alternate ground lines, which it seems not to have been.

The killer is the edge speed of the signals, so if you can slow them down, you gain dB's,
Adding serial resistors and possibly a small cap to gnd can round the edges, if you have the time budget.

If the driver is "programable" then you could look at the chip, depending upon what it is , it might have different drive strengths / slew rates, which again could lower your edge rate,

Does this cable to to a connector on the metal box ?
There are various connectors that have R/c networks in them to reduce the emissions, depends what you have ,

Do you have a near field probe and spec analyser to help you locate and evaluate the different changes and effects ?

https://interferencetechnology.com/diy-near-field-probes-preamplifiers/

From where you at, sorry , this is not going to be easy .

 

Thank you guys so much for your replies. I realize this is not a trivial task, which is why I asked the question here
@andrewmm Yes it's to reduce emission of the cable.
Simply put, I need a ~5dB reduction to a series of 33- and 135 MHz multiples in the range 66-500MHz. The specific frequencies obviously depends on the measument angle etc..
The cable is actual not a classic ribbon cable, but rather an FFC-type cable, so the ferrite is still and option - but I probably can't bundle it together very well Actually it's also pre-mounted on the display assembly, so tampering with it is.. difficult.. in terms of production line reproduceability.

I'm intrigued by your comment on diff-pair routing option, since the display data lines are basically just 3x8 (8-bit RGB) single-ended data lines. How would you go about pairing them?

I'll definitely look into slew rate reductions, if the FPGA supports it, but I kinda doubt I'm that lucky.
Otherwise I guess I need to go with the series resistor option (100/220R-ish?)
Do you happen to know if FFC connectors with build-in Res/cap network is a thing?

I unfortunately don't have near field probes. This is of course an issue - but I might get me some, because otherwise I'm basically just guessing what's what here....

I hope this answered your questions - please let me know if you to know anything further!
... And again; thanks for the input!

Cheers!

 

Thank you guys so much for your replies. I realize this is not a trivial task, which is why I asked the question here
@andrewmm Yes it's to reduce emission of the cable.
Simply put, I need a ~5dB reduction to a series of 33- and 135 MHz multiples in the range 66-500MHz. The specific frequencies obviously depends on the measument angle etc..
The cable is actual not a classic ribbon cable, but rather an FFC-type cable, so the ferrite is still and option - but I probably can't bundle it together very well Actually it's also pre-mounted on the display assembly, so tampering with it is.. difficult.. in terms of production line reproduceability.

I'm intrigued by your comment on diff-pair routing option, since the display data lines are basically just 3x8 (8-bit RGB) single-ended data lines. How would you go about pairing them?

I'll definitely look into slew rate reductions, if the FPGA supports it, but I kinda doubt I'm that lucky.
Otherwise I guess I need to go with the series resistor option (100/220R-ish?)
Do you happen to know if FFC connectors with build-in Res/cap network is a thing?

I unfortunately don't have near field probes. This is of course an issue - but I might get me some, because otherwise I'm basically just guessing what's what here....

I hope this answered your questions - please let me know if you to know anything further!
... And again; thanks for the input!

Cheers!

If you have an FPGA, then you are lucky
you almost certainly have different drive strengths, different edge speeds, and option of series resistance the FPGA

If its an FCC cable, then its not intended to be "outside" a shielded box,

One option on an FFC cable if its not already, is to build in a ground plane, makes the radiation reference to the ground plane, so the radiant length is lees,

is it your companies design a "standard"

if it is your own, and the signals are single ended,
a big problem is lack of ground return which you can fix next time, by making alternate traces a ground.

remember , The EM is proportional to the current flowing , and the length it flows around.
For a single ended signal, signal flows out of the sender, up the FFC cable, back down the gnd cable back to the sender chips ground.
current always follows a loop ( Kirchhoff's law I think )

 

A few products you might try: https://www.kgs-ind.com/products/emc/absorbers/

I also use their cable shield product to reduce EMI from switched power cables.

https://www.kgs-ind.com/products/emc/shielding/cable/ecbr-al/

EMI shield for 30MHz display SPI signals on jumper wires. It's bulky and stiff but it works well.

 

Don't expect miracles with just cable shielding. I still get easily measurable signals from the display on the spectrum analyzer.

A little hard to see with this old unit (hard to a multiple sweep picture for all intermittent signals with the cell phone camera). 50MHz center, 10MHz per division.

Fundamental at 30MHz and third harmonic at 90MHz

Relative signal (30 and 150MHz on this sweep picture) strength to some FM stations near 100MHz center freq, 20MHz div.

 

Another thing to look at from the software side is Slew Rate Control of the signal edges. I can usually get a sizable reduction in upper harmonics by limiting the edge speed.

This should be a adjustable option on most high speed devices (controllers or FPGA) and the default is usually the fastest valid slew rate.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an476.pdf

 

Hi @andrewmm and @nsaspook ,

thanks for the brilliant insights! Your replies has me feeling that I actually have a chance of achieving my goal!

@andrewmm
I will definitely try to tamper with the FPGA outputs, that's like a free gift!
Unfortunately I cannot do anything about the cabling as such. The display is a standard unit, delivered with the FCC cable - but if all else fails, I can try to use the EMI adhesive suggested by @nsaspook.
I think this is to closest I can get to get a build-in GND-plane...

@nsaspook
Thank you for the links and the demonstration!
I realize I am probably not going to achieve a well-implemented solution with loads of headroom here
Unfortunately this is the usual case of someone not designing for EMC and being surprised when the finished device fails. (Anyone heard THAT story before? )

That being said, I can do a small board-spin - but the device has to be extremely cheap, so my options fairly limited.
Anyway, I hope I can achieve some limitation of the emission noise power and maybe shield the rest, so maybe I'll opt for the combination of slew rate limitation (if possible) and some EMC absorber.

... I theory, if I was to wrap a band of EMC absorber around the FCC-cable close to the PCB, could that work (slightly) as a ferrite choke? Or will it not work, since the absorber is most likely not magnetic?

Again, thanks for your replies, they are greatly appreciated!

Cheers!