RC Lowpass Filter between Amplifier and ADC input

Thread Starter

Henry603

Joined Nov 19, 2018
69
Thank your for the Info! :)
In the absolute worst case the input on the analog inputs of the ADC can geto down to -0.014V. I checked the datasheet already before and it says that the analog input voltage must not go below V_ss-0.3V. So I guess the ADC should without any problem be able to handle negative voltages to lets say -0.2V right?
(i was a bit confused as you said it will break as soon as I apply any negative voltage)
 

bogosort

Joined Sep 24, 2011
678
Thank your for the Info! :)
In the absolute worst case the input on the analog inputs of the ADC can geto down to -0.014V. I checked the datasheet already before and it says that the analog input voltage must not go below V_ss-0.3V. So I guess the ADC should without any problem be able to handle negative voltages to lets say -0.2V right?
(i was a bit confused as you said it will break as soon as I apply any negative voltage)
Sorry for any confusion, I was referring to the general case of negative inputs. As the datasheet says, with Vss at 0V, breakage is possible if the input goes below -0.3 V. You should see negative codes (MSB set) for inputs in the range -0.3 < CH+ < 0 V.
 

Thread Starter

Henry603

Joined Nov 19, 2018
69
Sorry for any confusion, I was referring to the general case of negative inputs. As the datasheet says, with Vss at 0V, breakage is possible if the input goes below -0.3 V. You should see negative codes (MSB set) for inputs in the range -0.3 < CH+ < 0 V.
Ok, thank you very much for the clarification.
It should be fine then.
I closely matched the amplified signal (for my single ended measurement) to the v_ref voltage of the ADC (2.048V) and I guess I can simply exclude the negative values (in case there are some) by checking if the MSB is indicating a negative voltage and set my digital value to zero in that case.
Because I have no use for negative votlages.

Thanks! :)
 

Thread Starter

Henry603

Joined Nov 19, 2018
69
@bogosort :
One more question:
I'm using the MCP3424 (that is basically the same ADC but with 4 input channels).
I need to use only 3 of the 4 channels.
Can I just tie both pins of the unused channel (the CH+ pin and the CH- pin) to ground in that case?
(want to make sure they are on a known/valid potential and not left floating, but also want to make sure if I can tie them to GND directly without any problems).

Thank you very much :)
 

bogosort

Joined Sep 24, 2011
678
@bogosort :
One more question:
I'm using the MCP3424 (that is basically the same ADC but with 4 input channels).
I need to use only 3 of the 4 channels.
Can I just tie both pins of the unused channel (the CH+ pin and the CH- pin) to ground in that case?
(want to make sure they are on a known/valid potential and not left floating, but also want to make sure if I can tie them to GND directly without any problems).

Thank you very much :)
The safest bet is to tie the unused inputs to ground. The analog MUX probably won't care either way, but it doesn't cost anything to ground them. :)
 

Michael_G

Joined May 9, 2019
1
@crutschow :
Thank you for the great answer! :)

So using the filter when the ADC is doing 3.75 samples per second (and im reading it once per second, going for the 18Bit resolution) should be ok with the proposed filter?
Could I go higher with the values of the resistors (e.g. to 1k) as well as with the values of the caps (to e.g. 47µF)?
Or might there problems arise with higher values for R (e.g. regarding input impedance of the ADC) or higher capacitances? Any voltage drop or other negative effects on my signal possible here?
Like this:




As the ADC will run with 3.75 SPS. I thought that this gives me a sample frequency of 3.75 Hz.
Therefore, I figured I needed to attenuate all the signals that have a frequency >= 3.75/2 Hz to prevent aliasing.
But obviously that is wrong?


Can you please tell me how you can make this conclusion? (how do you get the time constant here and how do you know what time constant I need max.?)
Would be very happy If you could make that clearer to me :).

Thank you, I really appreciate your help, Henry.
I think the provided RC schematic has two problems:
1. 47.0uF caps which you are going to use will be electrolytic. This means they will have a leakage current, which depends from your luck and temperature. In worst case it can be up to 1uA. This current will create voltage drop over resistors, which can be critical for your precision.
2. I don't know about value of ADC input voltage, but if it is above 1V there is a danger when supply is switched off the capacitors going to discharge through ADC input ESD cell. In some situation they can burn ESD cell and kill the ADC.
My advice: use ceramic caps around 1 uF and bigger resistors
 

Thread Starter

Henry603

Joined Nov 19, 2018
69
I think the provided RC schematic has two problems:
1. 47.0uF caps which you are going to use will be electrolytic. This means they will have a leakage current, which depends from your luck and temperature. In worst case it can be up to 1uA. This current will create voltage drop over resistors, which can be critical for your precision.
2. I don't know about value of ADC input voltage, but if it is above 1V there is a danger when supply is switched off the capacitors going to discharge through ADC input ESD cell. In some situation they can burn ESD cell and kill the ADC.
My advice: use ceramic caps around 1 uF and bigger resistors
Hi Michael,

thank you very much for your answer.
I wouldnt think about your second point, thank you very much for that info!

Regarding your first point: I thought leakage current is only a problem with electrolytic capacitors (polarized caps).
Or am I mistaken? I use only unpolarized ceramic caps in my design.

Thank you very much.
 
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