1.
Design a circuit that resets a 7493 counter when it reaches decimal #6 using a multiplexer (mux). Feeding the outputs of the Q pins back into pins 2 & 3 of the 7493 turns out to be too noisy. Instead of a mux, how else could you reset the 7493?

2.
You are converting a stress measurement from one of the piezoelectric transducers in the lab and plan to limit the errors in your measurement to less than one percent. Assuming the lowest voltage is limited to zero volts and the highest will be limited to 5V, how many bits will you need to measure that maximum voltage using an ADC (analogue to digital) within the required error budget? If you want to capture vibrations from a new engine designed to run at 6000 RPMs, how much RAM storage (in bits and Bites) would you need to digitally record a 3-minute run of that engine so that you are sampling at least once per revolution with the accuracy stated previously?

 

1.

Feeding the outputs of the Q pins back into pins 2 & 3 of the 7493 turns out to be too noisy.

This can't be serious.

What gate might be able to detect a count of 6?

2. What is 1% of 5 volts? How many times does the engine go around in three minutes?

 

What gate might be able to detect a count of 6?

Ooohh, is it the "AND" gate?

Is this copied directly off the syllabus for three months in the future?

What references are you using for this course? (Besides here)

 

So for question two I know I need 18000 samples. does that mean I need 18000 bits of RAM space or is it something like 2^n=18000 where n is the number of bits??

 

You have not got to the number of bits in the value of the ADC conversion, so the question is still without an answer.

 

You have not got to the number of bits in the value of the ADC conversion, so the question is still without an answer.

Oh is that what they are asking for in the first part of the question?
Well for that I supposed that it is 1 volt per step so you need 3 bits or 2^3=8 steps to measure the 5V max signal. I am not sure how the 1% error plays a role here though....

 

Why 1 volt per step (whatever that may be)? the question asks:

You are converting a stress measurement from one of the piezoelectric transducers in the lab and plan to limit the errors in your measurement to less than one percent. Assuming the lowest voltage is limited to zero volts and the highest will be limited to 5V, how many bits will you need to measure that maximum voltage using an ADC (analogue to digital) within the required error budget?

You might benefit from answering the other question

What is 1% of 5 volts?

and thinking about bits.

 

How many bits make up 5 volts in your ADC?

Once you solve that, plug it into the question

What is 1% of 5v?

That should get you a little closer.

 

Oh so I am supposed to use 0.05 volts per step? So that means 100 steps so I need 7 bits per sample...