Question about OR gate

Thread Starter

Doppler2902

Joined Sep 15, 2020
37
Hello guys, I'm doing the logic gate OR, I simulated it on Multisim but I amn't obtaining the correct truth table, with all the inputs I obtained the turn ON LED. Am I doing something wrong?, thank you. (I take the circuit from the Datasheet of SN7432)

1602484034189.png1602484139179.png
 

ericgibbs

Joined Jan 29, 2010
18,766
hi,
In an actual TTL OR logic IC, the inputs would assume a partial High, but in Multisim, I am not sure what state the inputs would assume in simulation.
I do not use Multisim.

Try the Pull up suggestion see what we get.
E
 

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Thread Starter

Doppler2902

Joined Sep 15, 2020
37
No, I'm experimenting with the TTL taking advantage of the transistors features like the saturation and cut off checking the truth tables of the logic gates
 

Alec_t

Joined Sep 17, 2013
14,280
Ah, I was reading the A trace wrongly. (On account of my poor colour vision the black dominates over the thin red line).
 

ericgibbs

Joined Jan 29, 2010
18,766
hi,
Looks Ok.
Recommend that you use F4 and create a label for A, B, Out, then click on the label for plotting, the Red labels on my asc.
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