I'm looking for a circuit, that converts any square wave pulse to given pulse width. For example: input changing frequency and width pulses, output gives constant defined width pulses but in that same frequency. Required output pulse width: 1.25 miliseconds long.

Any ideas?

 

Look for a "edge-triggered one-shot" circuit.
Your input frequency will have to be less than 800 Hz ( 1/1.25mSec ). (If you already knew that, don't be offended: consider where we are.)

 

Thanks for your answer. Input pulses is longer than 1.25 miliseconds and pulse frequency (that is being varied) is also lower than 800Hz.

Any "dumbing down" is good. I'm a musician, not an electronics engineer, so very new to all this.

Is there any particular circuit, that is best suited for this? No microcontrolers please, no way to programm those.


I have looked at CD4093 datasheet witch suggested an RC network before one input to do that, but could not figure out formula given, to calculate proper values.

 

I may misunderstand your needs but I think a standard 555 circuit known as a "one shot" or monostable multivibrator would do what you described. The incoming pulse, however shaped, will trigger a single defined output pulse. The only "trick" is that the output needs to finish before the next input arrives.

 

I may misunderstand your needs but I think a standard 555 circuit known as a "one shot" or monostable multivibrator would do what you described. The incoming pulse, however shaped, will trigger a single defined output pulse. The only "trick" is that the output needs to finish before the next input arrives.

Just use a C/R differentiating filter on the input, the pulse is fed via a capacitor that is loaded by a resistor, the input responds immediately to the pulse edge but the capacitor charges to the pulse amplitude so what is fed to the input quickly decays - all you get is a spike to trigger the input.

 

Below is the LTspice simulation of a 555 one-shot circuit with the capacitor input as suggested by Ian to prevent its retrigger for long input pulses.

If you need to tweak the pulse width to get exactly 1.25ms then you can add a pot for R2 (say a 84.5kΩ resistor in series with a 50kΩ pot) since the pulse for the real circuit will differ some due to component tolerances.

Note that the 555 triggers on the falling edge of the input but I would expect that to not be a problem.

Remember to add the typical 0.1μF decoupling cap from pin 1 to pin 8 (power to ground).

 

What is the nput signal shape? Square, sine, symmetrical about ground, positive only, etc?

ak

 

Input signal is square wave. DC coupled positive pulses.

I will try the 555 timer suggestion. Just have to buy some 555's, apparently I have none of those lying around. Also, in given LTSpice simulation, isn't the input voltage spikes exceed supply voltage resulting fried chip? Place 4.7V zener diodes in parallel with 100k input resistors?

 

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Also, in given LTSpice simulation, isn't the input voltage spikes exceed supply voltage resulting fried chip? Place 4.7V zener diodes in parallel with 100k input resistors?

The bipolar 555 is generally tolerant of input voltages beyond the rails, particularly if the supply is only 5V but you can connect a diode from the V+ (cathode) to the trigger input and another diode from the trigger input (cathode) to ground if you want to be conservative.

 

If the circuit you want has 5 V input and output waveforms, then a 4093 will do exactly what you want using 2 of the 4 gates in one package. Anothere option is 2 of the 6 inverters in a 74HC14, a CMOS version of a TTL hex inverters with hysteresis. Either way, one gate acts as an iput buffer so the timing stage sees a constant output impedance, and the other gate is after the R-C to detect the end of the timing period and give a consistant output impedance to the outside world. With either part, the input signal goes through two inverting stages so the output signal polarity is unchanged from the input.

A potential problem is that the CMOS transition levels are not tightly defined, and vary a bit with temperature and from part to part. An equation to calculate the R and C timing components will not yield exact results, but they might be good enough for your application. The good news is that this isthe absolute minimum parts-count soluion. A starting point is:

t = 0.69 x R x C

For a CMOS gate with hysteresis, the two transition levels are symmetrical about 1/2 ov the Vcc voltage. 0.69 is the ln of 1/2. The actual trip point is 1/2 Vcc plus (or minus depending on the direction of the signal edge) 1/2 of the voltage difference between the two hysteresis transistion levels. This is the part that can very a bit.

The circuit is simple. Input goes through first gate. C goes from gate 1 output to gate 2 input. R goes from gate 2 input to Vcc if you are triggering the timer from the input positive-going edge, or to GND if you are triggering off the input negative edge. Add a small signal diode (1N914, 4148, etc.) across the resistor to protect the second gate input. You can one of the extra gates to invert the output signal so you have both polarties to use.

Because you have one equation and two unknown, you have to pick one, calculate the other, and then adjust for parts you have or can buy. Starting with C = 0.1 uF, you get R = 18 K. These are very reasonable numbers for a CMOS timing circuit. To get exactly 1.25 ms, the final resistor will be less than 18 K. If you want to tweak it in, use a 15 K fixed resistor in series with a 5 K trimpot. Another option woul 2.2 uF and 8.2 K, or 4.7 uF and 3.8 K. Each of these has a lower circuit impedance but approximately the same timing. The lower impedance is less susceptible to external noise, but needs more current out of the first gate, a common design tradeoff.

ak

 

So your two choices so far are a 555 circuit or a slightly simpler logic-gate circuit with probably somewhat less accuracy and stability, a typical engineering trade-off of simplicity versus performance.

 

The 555 looks great. I haven't got a chance to build this circuit, but I got all the parts needed and ready to try at the weekend. I thank you guys very much in advance. Simulation in LTSpice looks very promising.

 

Built the circuit, it worked out just fine. Just changed input resistor to 100k or so. Turns out this is not what I need. Now I am looking for a new circuit, that could modulate pulse width by half. Input is the same square wave with varying frequency and pulse width, output should be half of the input's pulses width.

Any ideas anyone?

 

The description is not clear. Can you draw up a simple sketch showing a typical input and the output you want?

ak

 

So are you asking that a circuit look in the future to determine what the input pulse width is going to be and output half that width before the input pulse finishes?
Not possible unless you have a time machine.

More realistically, how many input pulses can occur for the width to be measured and an output of half that be generated?

Sounds like a job for a microprocessor.

 

Found a solution myself the crude way: take out/ignore/null every other pulse. Implemented it with CD4017 counter and CD4093 NAND Schmitt Trigger. Works good. A bit of accuracy loss is negligible in my application. Microprocessor could do it better, averaging every 2 pulses, but I have no know-how nor hardware to program those.

Thank you all for your help! This is one of the most helpful forum with the most responsive people I have been.

 

Found a solution myself the crude way: take out/ignore/null every other pulse. ...................

I don't see how that meets your stated desire:
"Input is the same square wave with varying frequency and pulse width, output should be half of the input's pulses width."

 

Of course you're right. Turns out that in my application I can get away with just reducing frequency by half.