Dear all,
This thread partially continues where one of my previous threads ended, I'm referring to: AC/DC adaptor output in series with rectified mains output
Brief introduction of what is tried to be achieved:
In my PhD group one of the PhD's has issues with a piece of measurement equipment. We figured out it gives false readings due to the presence of voltage spikes on the mains power feeding the equipment, however, the manufacturer is not convinced. As a side project we are trying to show the equipment's weak spot by a coordinated experiment (i.e. not a necessity for the project but it seems a nice little challenge and an additional way to learn something extra).
The idea is to expose the equipment to short voltage pulses (see the graph below) on its line voltage powering the equipment, the pulses have slightly higher voltage than the current mains voltage. Eventually (I) the amplitude, (II) the timing and (III) the period of the pulse, and (IV) the repetition rate are to be controlled; at least every Pi cycle (i.e. at 100Hz for 50Hz mains) a peak is to be inserted.
Explanation of the schematic below:
A) From the referenced thread the idea originates to use the rectified output of a variac (e.g. MCP 500) to charge a capacitor to a set voltage (i.e. always below 230Vac + 10% being the max. allowed limit on the line voltage before equipment gets damaged).
B) In parallel ZMPT101B module (see link_1, and/or link_2) is used for for measuring (a) the line voltage amplitude (I), (b) the detection of zero crossings for pulse timing (II), and (c) the direction of the AC current flow to know which SSR to switch open, SSR-A or SSR-B.
(C) The Arduino board takes care of pulse timing (II), pulse period (III), and the repetition rate of the pulses (IV).
(D) two solid state relays (e.g. Fotek SSR-40DA, datasheet), SSR-A and SSR-B are used as high voltage switches to inject the pulse upon forward and reserve current respectively, such that the current of the line voltage and the pulse are additive.
To start the discussion, I would like to seek some advice from you regarding the following aspects:
1. The schematic uses solid state relays as switches, is this a good choice? It can adequately handle both current as well as voltage, it shields the electronics controlling it and for the pulse repetition rate and duration these SSRs are fast enough. Are there other switching components that would be more suitable?
2. Does the type of SSR chosen suit what is asked for? [e.g. Fotek SSR-40DA, datasheet] It should open when supplied with a positive 5V signal and immediately close when this signal is removed.
3. What do you see as the driving parameters for scaling the capacitor's capacity? The current flow will be lowest when inserting a pulse at PI/2, whereas moving toward integer PI the voltage difference grows and the currents will be larger. Putting in a power resistor will limit the current flow for the latter case but it will also limit the current flow at PI/2 which unwanted is my feeling... How can the current be limited using additional resistance in one case (i.e. pulse toward integer PI) while additional resistance is unwanted in the other case (i.e. pulse at PI/2)?
4. My feeling is that the diodes could also be placed by a single one after the capacitor, i.e. at the location where the line branches toward SSR-A and SSR-B. Is that correct?
4. Any other aspects that need attention?
I would very much like to hear your thoughts whether the proposed schematic can accomplish what the graph sketches and look forward what recommendations you have.
Kind regards,
Arjan
This thread partially continues where one of my previous threads ended, I'm referring to: AC/DC adaptor output in series with rectified mains output
Brief introduction of what is tried to be achieved:
In my PhD group one of the PhD's has issues with a piece of measurement equipment. We figured out it gives false readings due to the presence of voltage spikes on the mains power feeding the equipment, however, the manufacturer is not convinced. As a side project we are trying to show the equipment's weak spot by a coordinated experiment (i.e. not a necessity for the project but it seems a nice little challenge and an additional way to learn something extra).
The idea is to expose the equipment to short voltage pulses (see the graph below) on its line voltage powering the equipment, the pulses have slightly higher voltage than the current mains voltage. Eventually (I) the amplitude, (II) the timing and (III) the period of the pulse, and (IV) the repetition rate are to be controlled; at least every Pi cycle (i.e. at 100Hz for 50Hz mains) a peak is to be inserted.
Explanation of the schematic below:
A) From the referenced thread the idea originates to use the rectified output of a variac (e.g. MCP 500) to charge a capacitor to a set voltage (i.e. always below 230Vac + 10% being the max. allowed limit on the line voltage before equipment gets damaged).
B) In parallel ZMPT101B module (see link_1, and/or link_2) is used for for measuring (a) the line voltage amplitude (I), (b) the detection of zero crossings for pulse timing (II), and (c) the direction of the AC current flow to know which SSR to switch open, SSR-A or SSR-B.
(C) The Arduino board takes care of pulse timing (II), pulse period (III), and the repetition rate of the pulses (IV).
(D) two solid state relays (e.g. Fotek SSR-40DA, datasheet), SSR-A and SSR-B are used as high voltage switches to inject the pulse upon forward and reserve current respectively, such that the current of the line voltage and the pulse are additive.
To start the discussion, I would like to seek some advice from you regarding the following aspects:
1. The schematic uses solid state relays as switches, is this a good choice? It can adequately handle both current as well as voltage, it shields the electronics controlling it and for the pulse repetition rate and duration these SSRs are fast enough. Are there other switching components that would be more suitable?
2. Does the type of SSR chosen suit what is asked for? [e.g. Fotek SSR-40DA, datasheet] It should open when supplied with a positive 5V signal and immediately close when this signal is removed.
3. What do you see as the driving parameters for scaling the capacitor's capacity? The current flow will be lowest when inserting a pulse at PI/2, whereas moving toward integer PI the voltage difference grows and the currents will be larger. Putting in a power resistor will limit the current flow for the latter case but it will also limit the current flow at PI/2 which unwanted is my feeling... How can the current be limited using additional resistance in one case (i.e. pulse toward integer PI) while additional resistance is unwanted in the other case (i.e. pulse at PI/2)?
4. My feeling is that the diodes could also be placed by a single one after the capacitor, i.e. at the location where the line branches toward SSR-A and SSR-B. Is that correct?
4. Any other aspects that need attention?
I would very much like to hear your thoughts whether the proposed schematic can accomplish what the graph sketches and look forward what recommendations you have.
Kind regards,
Arjan
