Hallo,
I would like to use a Power N-fet in source follower configuration, intended to drive its gate with a VIN input voltage fixed at 12V and on drain a DC power supply that could be between 40V and 160V (DC).
By biasing the N-fet with a simple resistance to ground, I should get on its source the VIN-Vth.
My chosed N-fet it could be an Infineon OptiMOS3 at 200V (Vds).
But I'm not able to find a spice model functional on LTSpice.
My doubts and questions are related how to size the biasing resistance and if you see any drawback for this kind of configuration.
Thank you very much for your comments.

 

hi Andrea,
Welcome to AAC.
Which version of the OptiMOS3 are you planning to use.?
Look here
https://www.mouser.co.uk/Infineon/S.../OptiMOS-3-Series/_/N-ax1sf?P=1yshnnxZ1z0zl9u

You should be able to find in LTS a close match for an equivalent type.
E

 

By biasing the N-fet with a simple resistance to ground, I should get on its source the VIN-Vth it is error!

 

hi Andrea,
Welcome to AAC.
Which version of the OptiMOS3 are you planning to use.?
Look here
https://www.mouser.co.uk/Infineon/S.../OptiMOS-3-Series/_/N-ax1sf?P=1yshnnxZ1z0zl9u

You should be able to find in LTS a close match for an equivalent type.
E

 

You could use the Rgs such as 10K or 12K and the draw current is about 1 mA.

 

Hi all
Thank you very miuch everybody for your quick feedback.
The resistor I was talking about is between source and ground. Used to biasing current through the Nfet.
Talking about Nfet.
I'm planning to use IPB200N25N3 N-fet.
By appling a DC voltage to gate and biasing the Nfet through the source with the resistor, I shoul get VIN(gate voltage)-Vth on the source node.
Do you agree?
Any error in my thinking?
Thank again

 

hi A,
Why do you want a bias resistor in the Source.?
You normally control the MOSFET by applying a positive Gate to Source voltage.
Tell us how the FET is going to used.
E
Add the MOSFET PDF

 

The Vth is when a Mosfet is almost turned off, don't you want it to be turned on?
The gate-source voltage for Mosfets is a wide range so you must adjust the gate voltage or the source resistance for the amount of current (and amount of heating).

 

hi Andrea,
Mark up this image with the voltages that you going to use.
E

 

hi Andrea,
Mark up this image with the voltages that you going to use.
E
View attachment 162057

Exactly what I nave in mind.
Vg 0 to 12V as you wrote.
V2 us between 40V and 155V DC.
Output current equal to 1A

 

By appling a DC voltage to gate and biasing the Nfet through the source with the resistor, I shoul get VIN(gate voltage)-Vth on the source node.

I'm not sure why you care about the -Vth for and normally the resistor in series with Source pin is used to measures the Id current or limits the Id current, if you put the Load in Source pin then the Vin will be needs as Vin=12V+3V=15V, and the Rs can be use 0.1Ω or 0.01Ω or less, it depends the how much current that you want to detect or limited.

 

If the current is 1A then the 1k resistor will have 1000V across it. It ain't gonna happen.
The max current will be about 9mA.

 

If the current is 1A then the 1k resistor will have 1000V across it. It ain't gonna happen.
The max current will be about 9mA.

No. The 1K res is used to bias the nfet. When additional load is applied in parallel, the power nfet will drive what needed by keeping the 12V about on its output (source).
Basically my application is:
Vin supply=40V to 160V DC
I nerd Vout=12V about with Iout=1A.
I already have a circuit able to get this Vin and provide 12V (dcdc converter) but with only 200mA output max capacity.
I would like then add the discussed power Nfet to still regulate around 12V but with higher power output (12W).
Do you see any drawback?

 

Hi A,
Consider if you apply 12V to the Gate, momentarily the FET will conduct, current will flow in the source and load resistors.
The voltage drop across the load will oppose the Vgate to Gnd voltage, so there will longer be 12v between the Gate and Source pin.
As the current thru the load increases, so will the voltage drop between Gate and Source.
If your FET needs a Gate voltage of 3v, between the Gate and Source at the FET threshold conduction point, thats where the FET current is going to limit.
So the FET source/load voltage will limit at ~9V.
This means that the applied Gate voltage must be greater than say 18v to ensure that the FET is fully conducting at 12V, 1A into a 12R load .
I would use Gate voltage of 20V.
Do you follow that OK.?
E

EDIT:
For a required load voltage of 12V, why are you using 40v to 60v supply.?
The circuit will not work as you expect, the load voltage will not be regulated at 12v.!

 

The 1K res is used to bias the nfet.

What do you mean by "bias the nfet"?
What is the purpose of this bias?

 

Hi A,
Consider if you apply 12V to the Gate, momentarily the FET will conduct, current will flow in the source and load resistors.
The voltage drop across the load will oppose the Vgate to Gnd voltage, so there will longer be 12v between the Gate and Source pin.
As the current thru the load increases, so will the voltage drop between Gate and Source.
If your FET needs a Gate voltage of 3v, between the Gate and Source at the FET threshold conduction point, thats where the FET current is going to limit.
So the FET source/load voltage will limit at ~9V.
This means that the applied Gate voltage must be greater than say 18v to ensure that the FET is fully conducting at 12V, 1A into a 12R load .
I would use Gate voltage of 20V.
Do you follow that OK.?
E

EDIT:
For a required load voltage of 12V, why are you using 40v to 60v supply.?
The circuit will not work as you expect, the load voltage will not be regulated at 12v.!

The application is with an input voltage between 40V and 160V (an automotive-train battery) that must be regulated at 12V with 1A capability

 

What do you mean by "bias the nfet"?
What is the purpose of this bias?

To make the Nfet workimg also at no load, a current should flow through it. For me this current is the "bias" current of the nfet.
When I say make it working I'm meaning Always provide the 12V output

 

The application is with an input voltage between 40V and 160V (an automotive-train battery) that must be regulated at 12V with 1A capability

Hi A,
It will not regulate to 12V.
If you try to adjust the Gate voltage for the Source output, so that you get 12V at 1Amp, the remainder of the 40-160V will appear across the FET,
So at 1Amp thats 28Watt to 148Watts, the FET will cook.
E

 

Hi A,
It will not regulate to 12V.
If you try to adjust the Gate voltage for the Source output, so that you get 12V at 1Amp, the remainder of the 40-160V will appear across the FET,
So at 1Amp thats 28Watt to 148Watts, the FET will cook.
E

in the IPB200N25N3 datasheet (attached file) I see max absolute rating for Vds=250V and Id=64A, so I guess will not can cook at all….. or I'm still missing something?

 

They are abs values of 250V and 64A.
Check the operating graphs in the datasheet for typical values.

If you are convinced there will not be a problem, I suggest you go ahead and build it.
Lets know how the project goes.