Hello,

Please refer to the following link: https://www.st.com/en/power-transistors/stp55nf06.html# and also the attachments.
I have downloaded the pspice model of STP55NF06FP. (Please click on HW Model, CAD Libraries & SVD link).
I copied the .lib file to C:\Users\<My name>\Documents\LTspiceXVII\lib\sub and use LTSpice to create the symbol. (Right click on the line .SUBCKT and click create symbol).
However, after I perform a simulation, the waveform of STP55NF06FP is incorrect. Here, I compare the result with that of IRFZ44N. Please see the drains' waveforms. The gate driving signal is 0V - 10V square wave with 50% duty ratio and period of 50 microseconds.
Could you please give me an idea of how to solve this problem?

Sincerely,
BlackMelon

 

Place file Nmos_ST.lib to C:\Users\<My name>\Documents\LTspiceXVII\lib\sub
Place a symbol on your circuit and select the desired transistor from the pop-up menu. The model is adapted to LTspice. The Pspice model in LTspice gives an overvalued open transistor resistance of 0.002 ohms. For high power transistors this is a noticeable error.

 

Place file Nmos_ST.lib to C:\Users\<My name>\Documents\LTspiceXVII\lib\sub
Place a symbol on your circuit and select the desired transistor from the pop-up menu. The model is adapted to LTspice. The Pspice model in LTspice gives an overvalued open transistor resistance of 0.002 ohms. For high power transistors this is a noticeable error.

Thank you for the information. This is very helpful. I will update you with the result after following this guideline

Sincerely

 

See