I need to design a smart logic without any MCU and relays that would do this :

1/ When main power 24V is ON and the switch is in OFF -> no action.

2/ When main power 24V is ON and the switch is in ON -> enable the module power and no pulse on PWR_BTN. Module power needs to stay enable until 24V is powered on. When the switch is then switched from ON to OFF - PWR_BTN pulse needs to be generated, the same if the switch goes from OFF to ON again. Enable has to stay active during these actions until 24V is ON.

3/ When main power 24V is OFF and the switch is in ON position and then main power 24V goes ON, this has to cause ENABLE module active but no PWR_BTN pulse. PWR_BTN pulse has to be generated once the switch is then switched from ON to OFF and 24V remains ON, also when again the switch goes from OFF to ON again and 24V still remains ON.

Module has autostart, which means PWR_BTN pulse can not be generated when 24V is ON and you switch the switch from OFF to ON for the first time and the same if the switch is in ON position and you plugged 24V in. This two actions will just enable the module power.

Module_off signal is low if the module is in off state (when powered!) and module power remains active until 24V is ON.

Does anyone have an idea how to do that correctly?

Thanks.

 

I need to design a smart logic without any MCU and relays that would do this :

1. Are you requiring that this be done only with relays? and no electronic components?
2. What is the tolerance for the 100ms pulse?

 

1. Are you requiring that this be done only with relays? and no electronic components?
2. What is the tolerance for the 100ms pulse?

No relays and MCU. The pulse should be 100ms - 200ms. I have also modified the diagram here.

 

No relays and MCU. The pulse should be 100ms - 200ms. I have also modified the diagram here.

What type of switches are used for on/off and logic power?

 

toggle switch which remains in the position ON or OFF once switched

 

Exactly how many control signals are there and what are their designations.

 

There is a ON/OFF toggle switch.
ENABLE to power up the module.
MODULE_OFF = output from module to indicate off state.
PWR_BTN = input to module to switch it on/off (exluding the first start since there is autostart).

 

Here is first pass design.
This uses three chips: 2ea-CD4093B NAND gate, 1ea-CD14538 Timer

Each time the SW changes state, a pulse is generated by U1A that triggers a dual edge detector (U2).
U2(A-D) create a dual edge detector that will trigger the 100ms pulse generator (U3B).
U1(B,C) create a SR FF, The SR FF triggers a 1ms delay that inhibits the 100ms timer the first time the switch changes state.
I haven't bench tested this but will if you are interested. Simulation is below.

EDIT: modified input. Input NAND gate (was U1A) not needed.

 

@eetech00 thanks! Looks great, I will check it out. Yes, I am definitely interested in bench test.
Do you also mind sharing .asc file with me, please?

 

@eetech00 thanks! Looks great, I will check it out. Yes, I am definitely interested in bench test.
Do you also mind sharing .asc file with me, please?

I've modified the schematic in post #8.

 

I've modified the schematic in post #8.

Thank you, will you do the bench test, please?

 

Thank you, will you do the bench test, please?

Here is the final version after bench testing. The circuit works as intended.
The circuit works without a de-bounce circuit and a good (low bounce <=20ms ) switch. But there were a couple unused gates so I used them for debouncing. See below.





I'll post the LTspice soon.

 

Great, thank you @eetech00 . Really appreciate that.

 

Here is the final version after bench testing. The circuit works as intended.
The circuit works without a de-bounce circuit and a good (low bounce <=20ms ) switch. But there were a couple unused gates so I used them for debouncing. See below.

View attachment 363139

View attachment 363140

I'll post the LTspice soon.

@eetech00 Do you mind sharing ltspice file with me, please?

 

@eetech00 Do you mind sharing ltspice file with me, please?

Here you go....

The attached file also contains some custom symbols.
Edit: Updated .zip file

 

@eetech00 Thanks a lot. Why does it show me .lib d_v.lib could not be found?

 

hi jan,
Until @eetech00 logs in, try this simple edit to allow the main circuit to run.
Delete the Vdd decoupling blocks.

E

 

@eetech00 Thanks a lot. Why does it show me .lib d_v.lib could not be found?

A file used by the power pin symbols was left out of the zip file.
I've updated the .zip file in post #15.