Hello,

I have a generic questions about PLLs. I understand the basics around how these work, and encounter them on a daily basis, but have never really delved deeply into the technicalities. So my question is, given a PLL and a reference frequency range (possibly configurable), does it matter if the reference frequency is outside this area? I assume yes, and that the reference frequency impacts the timing and "cleanness" of the output signal (phase noice etc). However in which way? Is it, say, OK to lie below the PLL reference frequency, if the PLL is operating very slowly?

 

If your PLL ref frequency out out of the device lock range, the PLL will not lock to it, so the vco will free run.
Your question is pretty vague and is a bit device specific.

 

Thank you for your reply, dendad. This sounds critical. You are right about the device-specificity, this is about an embedded PLL in a DRAM chip. I am able to input significantly lower reference clock than the datasheet says is supported, but the DDR is functioning without problem and at significantly lower power draw, so there is definitely a change. So to get to the bottom of this I may have to contact manufacturer, since the VCO definitely has some constraints with respect to input reference clock.

 

You are right about the device-specificity, this is about an embedded PLL in a DRAM chip. I am able to input significantly lower reference clock than the datasheet says is supported, but the DDR is functioning without problem and at significantly lower power draw, so there is definitely a change. So to get to the bottom of this I may have to contact manufacturer, since the VCO definitely has some constraints with respect to input reference clock.

The operating ranges of the PLL and DDR operation are dependent on temperature. The DDR may very well work at room temperature -- for a while. At higher temperatures, the data may leak away too quickly too run at a low frequency clock. The DDR will only be reliable if it is operated within the manufacturers specifications.

Please post the DDR data sheet here. It will help others give better replies.