PLL lock time

Thread Starter

sidjur

Joined Aug 26, 2017
10
I have I question about PLL.

Let’s say I have two different input signals with different phase but the same frequency. Both signals are getting compared by a phase detector (type one or two) inside a PLL with the internal frequency provided by the VCO.

Am I right that the time to trim (lock) the internal frequency to the input frequency depends on the phase of the input signal?

Regards,

Juri
 
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