PIC Development Board with PK3

JohnInTX · Sep 23, 2020

1: Try some basic C constructs like loops, arrays, value tests using if-else, a switch statement etc. You can stop in places and inspect the loop counters, see how arrays are indexed, where the switch statement goes when you set different values for the switch argument etc. Play with timers and interrupts. Explore the peripherals. Whatever you feel you are weak on. Code it up and step it through. In this case, the simulator/debugger can be an instructor.
2: Yes! I would take what you just did and run it on the hardware using your PK3 as a debugger. That will give you some experience before the code gets more complex.
3: Yes, a real PK3 will interface to the target PIC's internal debug hardware. There usually are some limitations, number of breakpoints etc, that are chip-dependent. You can see what they are in the MPLABX dashboard window. You will be able to do the things you did in the sim i.e. set breakpoints, inspect and modify memory registers etc.

jpanhalt · Sep 23, 2020

The first time I moved from simulation to hardware debug, I was disappointed in the limited number of breakpoints (for my chips it was either 1 or 3). Once I was doing it, just 1 is barely an inconvenience, and 3 is more than I need. You can move them on the fly, at least with Assembly. That is, after you pass a breakpoint, you can move an earlier one to later in the program.

JohnInTX · Sep 23, 2020

JohnInTX said:
1: Try some basic C constructs like loops, arrays, value tests using if-else, a switch statement etc. You can stop in places and inspect the loop counters, see how arrays are indexed, where the switch statement goes when you set different values for the switch argument etc. Play with timers and interrupts. Explore the peripherals. Whatever you feel you are weak on. Code it up and step it through. In this case, the simulator/debugger can be an instructor.
2: Yes! I would take what you just did and run it on the hardware using your PK3 as a debugger. That will give you some experience before the code gets more complex.
3: Yes, a real PK3 will interface to the target PIC's internal debug hardware. There usually are some limitations, number of breakpoints etc, that are chip-dependent. You can see what they are in the MPLABX dashboard window. You will be able to do the things you did in the sim i.e. set breakpoints, inspect and modify memory registers etc.

Thinking more on this.. you should probably concentrate on your other thread with @trebla before leaving it and going off on something new. You still have difficulties in organizing your thoughts to describe a procedure and drawing state and flow diagrams. You can play with some of these things but if you can't organize a solution to a programming problem none of this will help.

Remember that debugging is the process that you use to resolve differences between your system's expected behavior and observed behavior. If you don't have a solid design, you can't know what the expected behavior should be so debugging is pointless if not impossible.

Djsarakar · Sep 25, 2020

I am trying to set timer interrupt for 1ms

C:

#define _XTAL_FREQ 20000000
#include <xc.h>

// PIC18F45K80 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1L
#pragma config RETEN = OFF      // VREG Sleep Enable bit (Ultra low-power regulator is Disabled (Controlled by REGSLP bit))
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit (LF-INTOSC in High-power mode during Sleep)
#pragma config SOSCSEL = HIGH   // SOSC Power Selection and mode Configuration bits (High Power SOSC circuit selected)
#pragma config XINST = OFF       // Extended Instruction Set (Enabled)

// CONFIG1H
#pragma config FOSC = INTIO2    // Oscillator (Internal RC oscillator)
#pragma config PLLCFG = OFF     // PLL x4 Enable bit (Disabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
#pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power Up Timer (Disabled)
#pragma config BOREN = SBORDIS  // Brown Out Detect (Enabled in hardware, SBOREN disabled)
#pragma config BORV = 3         // Brown-out Reset Voltage bits (1.8V)
#pragma config BORPWR = ZPBORMV // BORMV Power level (ZPBORMV instead of BORMV is selected)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
#pragma config WDTPS = 1048576  // Watchdog Postscaler (1:1048576)

// CONFIG3H
#pragma config CANMX = PORTB    // ECAN Mux bit (ECAN TX and RX pins are located on RB2 and RB3, respectively)
#pragma config MSSPMSK = MSK7   // MSSP address masking (7 Bit address masking mode)
#pragma config MCLRE = ON       // Master Clear Enable (MCLR Enabled, RE3 Disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Overflow Reset (Enabled)
#pragma config BBSIZ = BB2K     // Boot Block Size (2K word Boot Block size)

// CONFIG5L
#pragma config CP0 = OFF        // Code Protect 00800-01FFF (Disabled)
#pragma config CP1 = OFF        // Code Protect 02000-03FFF (Disabled)
#pragma config CP2 = OFF        // Code Protect 04000-05FFF (Disabled)
#pragma config CP3 = OFF        // Code Protect 06000-07FFF (Disabled)

// CONFIG5H
#pragma config CPB = OFF        // Code Protect Boot (Disabled)
#pragma config CPD = OFF        // Data EE Read Protect (Disabled)

// CONFIG6L
#pragma config WRT0 = OFF       // Table Write Protect 00800-01FFF (Disabled)
#pragma config WRT1 = OFF       // Table Write Protect 02000-03FFF (Disabled)
#pragma config WRT2 = OFF       // Table Write Protect 04000-05FFF (Disabled)
#pragma config WRT3 = OFF       // Table Write Protect 06000-07FFF (Disabled)

// CONFIG6H
#pragma config WRTC = OFF       // Config. Write Protect (Disabled)
#pragma config WRTB = OFF       // Table Write Protect Boot (Disabled)
#pragma config WRTD = OFF       // Data EE Write Protect (Disabled)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protect 00800-01FFF (Disabled)
#pragma config EBTR1 = OFF      // Table Read Protect 02000-03FFF (Disabled)
#pragma config EBTR2 = OFF      // Table Read Protect 04000-05FFF (Disabled)
#pragma config EBTR3 = OFF      // Table Read Protect 06000-07FFF (Disabled)

// CONFIG7H
#pragma config EBTRB = OFF      // Table Read Protect Boot (Disabled)

void main(void) {

 
     TRISB = 0; //RB as Output Port

     RB4  = 0;  // Pin Low
 
//Timer0
//Prescaler 1:1; TMR0 Preload = 60536; Actual Interrupt Time : 1 ms

  T0CON     = 0x88;
  TMR0H     = 0xEC;
  TMR0L     = 0x78;

  GIE = 1;  // Global interrupt enable bit
  TMR0IE     = 1; //Timer0 overflow enable bit


  while(1)
  {
 
  }
 

  //  return ;
}

void Interrupt(){
  if (TMR0IF == 1) // Timer0 overflow interrupt flag bit
  {
     TMR0IF = 0;
      RB4 =~ RB4;
     TMR0H     = 0xEC;
     TMR0L     = 0x78;
  }
}

When I set breakpoint inside in ISR routine line 104 in debugger show mesage cannot be resolved to a valid program memory address. What's wrong with this

Ian Rogers · Sep 25, 2020

That's NOT how you use the interrupt
Copy this.

C:

void interrupt ISR(){
  if (TMR0IF == 1) // Timer0 overflow interrupt flag bit
  {
     TMR0IF = 0;
      RB4 =~ RB4;
     TMR0H     = 0xEC;
     TMR0L     = 0x78; 
  }
}

Also.. With an 8Mhz internal crystal that code fires the interrupt every 2.5mS..

Even if you run the entire timer register it's 32.77 mS... If you have an external counter and increase every 2.5mS

I did this

C:

volatile int icnt=0;

void interrupt ISR(){
  if (TMR0IF == 1) // Timer0 overflow interrupt flag bit
  {
    if(icnt++ == 400){
     
      RB4 =~ RB4;
        icnt = 0;
    }
    TMR0H     = 0xEC;
    TMR0L     = 0x78; 
    TMR0IF = 0;
  }
}

This is on the internal 8Hhz clock..

JohnInTX · Sep 25, 2020

Interrupts are covered in section 5.8 of the XC8 user’s guide.
https://ww1.microchip.com/downloads/en/DeviceDoc/50002737C XC8 C Compiler UG for PIC.pdf
The syntax to make an interrupt service routine is covered with examples. You probably won’t be using the priority structure so you don’t have to specify a priority in the interrupt declaration.

JohnInTX · Sep 25, 2020

I have declared variable in main function Why the error
blink.c:105:8: error: use of undeclared identifier 'icnt'
if(icnt++ == 400){
^

Since you declared icnt within main it is not visible outside of main.

google ‘c variable scope rules’

Ian Rogers · Sep 26, 2020

Heres the whole code...(Works both in sim AND real..)

Always place functions BEFORE the main unless you define them first..

C:

#define _XTAL_FREQ 8000000
#include <xc.h>

// PIC18F45K80 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1L
#pragma config RETEN = OFF      // VREG Sleep Enable bit (Ultra low-power regulator is Disabled (Controlled by REGSLP bit))
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit (LF-INTOSC in High-power mode during Sleep)
#pragma config SOSCSEL = HIGH   // SOSC Power Selection and mode Configuration bits (High Power SOSC circuit selected)
#pragma config XINST = OFF       // Extended Instruction Set (Enabled)

// CONFIG1H
#pragma config FOSC = INTIO2    // Oscillator (Internal RC oscillator)
#pragma config PLLCFG = OFF     // PLL x4 Enable bit (Disabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
#pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power Up Timer (Disabled)
#pragma config BOREN = SBORDIS  // Brown Out Detect (Enabled in hardware, SBOREN disabled)
#pragma config BORV = 3         // Brown-out Reset Voltage bits (1.8V)
#pragma config BORPWR = ZPBORMV // BORMV Power level (ZPBORMV instead of BORMV is selected)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
#pragma config WDTPS = 1048576  // Watchdog Postscaler (1:1048576)

// CONFIG3H
#pragma config CANMX = PORTB    // ECAN Mux bit (ECAN TX and RX pins are located on RB2 and RB3, respectively)
#pragma config MSSPMSK = MSK7   // MSSP address masking (7 Bit address masking mode)
#pragma config MCLRE = ON       // Master Clear Enable (MCLR Enabled, RE3 Disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Overflow Reset (Enabled)
#pragma config BBSIZ = BB2K     // Boot Block Size (2K word Boot Block size)

// CONFIG5L
#pragma config CP0 = OFF        // Code Protect 00800-01FFF (Disabled)
#pragma config CP1 = OFF        // Code Protect 02000-03FFF (Disabled)
#pragma config CP2 = OFF        // Code Protect 04000-05FFF (Disabled)
#pragma config CP3 = OFF        // Code Protect 06000-07FFF (Disabled)

// CONFIG5H
#pragma config CPB = OFF        // Code Protect Boot (Disabled)
#pragma config CPD = OFF        // Data EE Read Protect (Disabled)

// CONFIG6L
#pragma config WRT0 = OFF       // Table Write Protect 00800-01FFF (Disabled)
#pragma config WRT1 = OFF       // Table Write Protect 02000-03FFF (Disabled)
#pragma config WRT2 = OFF       // Table Write Protect 04000-05FFF (Disabled)
#pragma config WRT3 = OFF       // Table Write Protect 06000-07FFF (Disabled)

// CONFIG6H
#pragma config WRTC = OFF       // Config. Write Protect (Disabled)
#pragma config WRTB = OFF       // Table Write Protect Boot (Disabled)
#pragma config WRTD = OFF       // Data EE Write Protect (Disabled)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protect 00800-01FFF (Disabled)
#pragma config EBTR1 = OFF      // Table Read Protect 02000-03FFF (Disabled)
#pragma config EBTR2 = OFF      // Table Read Protect 04000-05FFF (Disabled)
#pragma config EBTR3 = OFF      // Table Read Protect 06000-07FFF (Disabled)

// CONFIG7H
#pragma config EBTRB = OFF      // Table Read Protect Boot (Disabled)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
volatile int icnt=0;

void interrupt ISR(){
  if (TMR0IF == 1) // Timer0 overflow interrupt flag bit
  {
    if(icnt++ == 400){
     
      RB4 =~ RB4;
        icnt = 0;
    }
    TMR0H     = 0xEC;
    TMR0L     = 0x78; 
    TMR0IF = 0;
  }
}

void main(void) {

  
     TRISB = 0; //RB as Output Port

     RB4  = 0;  // Pin Low
  
//Timer0
//Prescaler 1:1; TMR0 Preload = 60536; Actual Interrupt Time : 1 ms

  T0CON     = 0x88;
  TMR0H     = 0xEC;
  TMR0L     = 0x78;

  GIE = 1;  // Global interrupt enable bit
  TMR0IE     = 1; //Timer0 overflow enable bit


  while(1)
  {
  
  }
  

  //  return ;
}

Djsarakar · Sep 26, 2020

This is my working code. Problem was that I had to convert the analog pin into digital pin

C:

#define _XTAL_FREQ 8000000

#include <xc.h>

// PIC18F45K80 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1L
#pragma config RETEN = OFF      // VREG Sleep Enable bit (Ultra low-power regulator is Disabled (Controlled by REGSLP bit))
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit (LF-INTOSC in High-power mode during Sleep)
#pragma config SOSCSEL = HIGH   // SOSC Power Selection and mode Configuration bits (High Power SOSC circuit selected)
#pragma config XINST = OFF       // Extended Instruction Set (Enabled)

// CONFIG1H
#pragma config FOSC = INTIO2    // Oscillator (Internal RC oscillator)
#pragma config PLLCFG = OFF     // PLL x4 Enable bit (Disabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
#pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power Up Timer (Disabled)
#pragma config BOREN = SBORDIS  // Brown Out Detect (Enabled in hardware, SBOREN disabled)
#pragma config BORV = 3         // Brown-out Reset Voltage bits (1.8V)
#pragma config BORPWR = ZPBORMV // BORMV Power level (ZPBORMV instead of BORMV is selected)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
#pragma config WDTPS = 1048576  // Watchdog Postscaler (1:1048576)

// CONFIG3H
#pragma config CANMX = PORTB    // ECAN Mux bit (ECAN TX and RX pins are located on RB2 and RB3, respectively)
#pragma config MSSPMSK = MSK7   // MSSP address masking (7 Bit address masking mode)
#pragma config MCLRE = ON       // Master Clear Enable (MCLR Enabled, RE3 Disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Overflow Reset (Enabled)
#pragma config BBSIZ = BB2K     // Boot Block Size (2K word Boot Block size)

// CONFIG5L
#pragma config CP0 = OFF        // Code Protect 00800-01FFF (Disabled)
#pragma config CP1 = OFF        // Code Protect 02000-03FFF (Disabled)
#pragma config CP2 = OFF        // Code Protect 04000-05FFF (Disabled)
#pragma config CP3 = OFF        // Code Protect 06000-07FFF (Disabled)

// CONFIG5H
#pragma config CPB = OFF        // Code Protect Boot (Disabled)
#pragma config CPD = OFF        // Data EE Read Protect (Disabled)

// CONFIG6L
#pragma config WRT0 = OFF       // Table Write Protect 00800-01FFF (Disabled)
#pragma config WRT1 = OFF       // Table Write Protect 02000-03FFF (Disabled)
#pragma config WRT2 = OFF       // Table Write Protect 04000-05FFF (Disabled)
#pragma config WRT3 = OFF       // Table Write Protect 06000-07FFF (Disabled)

// CONFIG6H
#pragma config WRTC = OFF       // Config. Write Protect (Disabled)
#pragma config WRTB = OFF       // Table Write Protect Boot (Disabled)
#pragma config WRTD = OFF       // Data EE Write Protect (Disabled)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protect 00800-01FFF (Disabled)
#pragma config EBTR1 = OFF      // Table Read Protect 02000-03FFF (Disabled)
#pragma config EBTR2 = OFF      // Table Read Protect 04000-05FFF (Disabled)
#pragma config EBTR3 = OFF      // Table Read Protect 06000-07FFF (Disabled)

// CONFIG7H
#pragma config EBTRB = OFF      // Table Read Protect Boot (Disabled)


void main(void)
{
    // Your initialization, but do not enable interrupts
        TRISB = 0; //RB as Output Port
     RB4  = 0;  // Pin Low
   ANCON0 = 0x00;
    ANCON1 = 0x00;
  
    T0CON     = 0x88;
    TMR0H     = 0xEC;
    TMR0L     = 0x78;
  
  
    GIE = 1;  // Global interrupt enable bit
    TMR0IE     = 1; //Timer0 overflow enable bit

    while (1) {
  
    }
}

volatile int icnt=0;

void __interrupt(high_priority) tcInt(void){
  if (TMR0IF == 1) // Timer0 overflow interrupt flag bit
  {
    if(icnt++ == 400){
  
      RB4 =~ RB4;
        icnt = 0;
    }
    TMR0H     = 0xEC;
    TMR0L     = 0x78;
    TMR0IF = 0;
  }
}

Djsarakar · Sep 26, 2020

@Ian Rogers I'm trying to configure the internal oscillator on the PIC18F45K80 for 64MHz

How to configure for 64MHz ?

Ian Rogers · Sep 26, 2020

Djsarakar said:
How to configure for 64MHz ?

16Mhz + pll.... OSCCON reg needs to read 0x70.. You can poll the stability bit or throw a couple of nop()s after the OSCCON command. Enable the PLLCFG in the config pragma.. Then set the PLLEN in the OSCTUNE reg..

Djsarakar · Sep 26, 2020

Ian Rogers said:
16Mhz + pll.... OSCCON reg needs to read 0x70.. You can poll the stability bit or throw a couple of nop()s after the OSCCON command. Enable the PLLCFG in the config pragma.. Then set the PLLEN in the OSCTUNE reg..

I am posting code and attaching screenshot of simulation to inspect that I have configure system clock correctly. code is working but if something wrong there let me know

C:

#define _XTAL_FREQ 64000000
#include <xc.h>

// PIC18F45K80 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1L
#pragma config RETEN = OFF      // VREG Sleep Enable bit (Ultra low-power regulator is Disabled (Controlled by REGSLP bit))
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit (LF-INTOSC in High-power mode during Sleep)
#pragma config SOSCSEL = HIGH   // SOSC Power Selection and mode Configuration bits (High Power SOSC circuit selected)
#pragma config XINST = OFF       // Extended Instruction Set (Enabled)

// CONFIG1H
#pragma config FOSC = HS2       // Oscillator (HS oscillator (High power, 16 MHz - 25 MHz))
//#pragma config FOSC = INTIO2    // Oscillator (Internal RC oscillator)
#pragma config PLLCFG = ON     // PLL x4 Enable bit (Disabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
#pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power Up Timer (Disabled)
#pragma config BOREN = SBORDIS  // Brown Out Detect (Enabled in hardware, SBOREN disabled)
#pragma config BORV = 3         // Brown-out Reset Voltage bits (1.8V)
#pragma config BORPWR = ZPBORMV // BORMV Power level (ZPBORMV instead of BORMV is selected)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
#pragma config WDTPS = 1048576  // Watchdog Postscaler (1:1048576)

// CONFIG3H
#pragma config CANMX = PORTB    // ECAN Mux bit (ECAN TX and RX pins are located on RB2 and RB3, respectively)
#pragma config MSSPMSK = MSK7   // MSSP address masking (7 Bit address masking mode)
#pragma config MCLRE = ON       // Master Clear Enable (MCLR Enabled, RE3 Disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Overflow Reset (Enabled)
#pragma config BBSIZ = BB2K     // Boot Block Size (2K word Boot Block size)

// CONFIG5L
#pragma config CP0 = OFF        // Code Protect 00800-01FFF (Disabled)
#pragma config CP1 = OFF        // Code Protect 02000-03FFF (Disabled)
#pragma config CP2 = OFF        // Code Protect 04000-05FFF (Disabled)
#pragma config CP3 = OFF        // Code Protect 06000-07FFF (Disabled)

// CONFIG5H
#pragma config CPB = OFF        // Code Protect Boot (Disabled)
#pragma config CPD = OFF        // Data EE Read Protect (Disabled)

// CONFIG6L
#pragma config WRT0 = OFF       // Table Write Protect 00800-01FFF (Disabled)
#pragma config WRT1 = OFF       // Table Write Protect 02000-03FFF (Disabled)
#pragma config WRT2 = OFF       // Table Write Protect 04000-05FFF (Disabled)
#pragma config WRT3 = OFF       // Table Write Protect 06000-07FFF (Disabled)

// CONFIG6H
#pragma config WRTC = OFF       // Config. Write Protect (Disabled)
#pragma config WRTB = OFF       // Table Write Protect Boot (Disabled)
#pragma config WRTD = OFF       // Data EE Write Protect (Disabled)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protect 00800-01FFF (Disabled)
#pragma config EBTR1 = OFF      // Table Read Protect 02000-03FFF (Disabled)
#pragma config EBTR2 = OFF      // Table Read Protect 04000-05FFF (Disabled)
#pragma config EBTR3 = OFF      // Table Read Protect 06000-07FFF (Disabled)

// CONFIG7H
#pragma config EBTRB = OFF      // Table Read Protect Boot (Disabled)


void main(void)
{

    TRISB = 0; //RB as Output Port
    RB4  = 0;  // Pin Low

    ANCON0 = 0x00;
    ANCON1 = 0x00;
 
    OSCCON  = 0x70;
  
    while (1) {
    RB4  = 1;  // Pin Low
    __delay_ms(1000);
    RB4  = 0;  // Pin Low
     __delay_ms(1000);
   
    }
}

Ian Rogers · Sep 27, 2020

Nope.... You NEED the internal oscillator...

//#pragma config FOSC = HS2 // Oscillator (HS oscillator (High power, 16 MHz - 25 MHz))
#pragma config FOSC = INTIO2 // Oscillator (Internal RC oscillator)

Ian Rogers · Sep 27, 2020

Also..

// after
OSCCON =0x70;...
//add
Nop();
Nop();
Nop();
So the oscillator can settle..

Djsarakar · Sep 27, 2020

I want to use on board pushbutton My question is whether I need to connect 5v and GND to power to use sw1

attached complete schematics

Ian Rogers · Sep 27, 2020

Nope... These boards normally connect to a port with internal pullups, But it would appear yours has RPack connected to 5V.
So a keypress registers as a 0 on the pin when pressed...

Djsarakar · Sep 27, 2020

Ian Rogers said:
Nope... These boards normally connect to a port with internal pullups, But it would appear yours has RPack connected to 5V.
So a keypress registers as a 0 on the pin when pressed...

I am debugging code(software simulation) to inspect problem

Code:

#define _XTAL_FREQ 8000000

#include <xc.h>

// PIC18F45K80 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1L
#pragma config RETEN = OFF      // VREG Sleep Enable bit (Ultra low-power regulator is Disabled (Controlled by REGSLP bit))
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit (LF-INTOSC in High-power mode during Sleep)
#pragma config SOSCSEL = HIGH   // SOSC Power Selection and mode Configuration bits (High Power SOSC circuit selected)
#pragma config XINST = OFF       // Extended Instruction Set (Enabled)

// CONFIG1H
#pragma config FOSC = INTIO2    // Oscillator (Internal RC oscillator)
#pragma config PLLCFG = OFF     // PLL x4 Enable bit (Disabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
#pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power Up Timer (Disabled)
#pragma config BOREN = SBORDIS  // Brown Out Detect (Enabled in hardware, SBOREN disabled)
#pragma config BORV = 3         // Brown-out Reset Voltage bits (1.8V)
#pragma config BORPWR = ZPBORMV // BORMV Power level (ZPBORMV instead of BORMV is selected)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
#pragma config WDTPS = 1048576  // Watchdog Postscaler (1:1048576)

// CONFIG3H
#pragma config CANMX = PORTB    // ECAN Mux bit (ECAN TX and RX pins are located on RB2 and RB3, respectively)
#pragma config MSSPMSK = MSK7   // MSSP address masking (7 Bit address masking mode)
#pragma config MCLRE = ON       // Master Clear Enable (MCLR Enabled, RE3 Disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Overflow Reset (Enabled)
#pragma config BBSIZ = BB2K     // Boot Block Size (2K word Boot Block size)

// CONFIG5L
#pragma config CP0 = OFF        // Code Protect 00800-01FFF (Disabled)
#pragma config CP1 = OFF        // Code Protect 02000-03FFF (Disabled)
#pragma config CP2 = OFF        // Code Protect 04000-05FFF (Disabled)
#pragma config CP3 = OFF        // Code Protect 06000-07FFF (Disabled)

// CONFIG5H
#pragma config CPB = OFF        // Code Protect Boot (Disabled)
#pragma config CPD = OFF        // Data EE Read Protect (Disabled)

// CONFIG6L
#pragma config WRT0 = OFF       // Table Write Protect 00800-01FFF (Disabled)
#pragma config WRT1 = OFF       // Table Write Protect 02000-03FFF (Disabled)
#pragma config WRT2 = OFF       // Table Write Protect 04000-05FFF (Disabled)
#pragma config WRT3 = OFF       // Table Write Protect 06000-07FFF (Disabled)

// CONFIG6H
#pragma config WRTC = OFF       // Config. Write Protect (Disabled)
#pragma config WRTB = OFF       // Table Write Protect Boot (Disabled)
#pragma config WRTD = OFF       // Data EE Write Protect (Disabled)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protect 00800-01FFF (Disabled)
#pragma config EBTR1 = OFF      // Table Read Protect 02000-03FFF (Disabled)
#pragma config EBTR2 = OFF      // Table Read Protect 04000-05FFF (Disabled)
#pragma config EBTR3 = OFF      // Table Read Protect 06000-07FFF (Disabled)

// CONFIG7H
#pragma config EBTRB = OFF      // Table Read Protect Boot (Disabled)


void main(void)
{
 
    PORTC = 0b00000000; 
    PORTB = 0b00000001; 
    
    ANCON0 = 0x00;
    ANCON1 = 0x00;
  
    RC0 = 0;  // LED OFF

    while (1) {
        if (RB7 == 1)  // check switch if pressed
            __delay_ms(40); // wait
        {
           if (RB7 == 1)   // check switch if pressed
           {
             RC0 = 1;   // LED ON
           }
        }
}

}

why I never get line 88 while debugging

hexreader · Sep 27, 2020

Your indenting is really, really terrible. When you indent correctly and consistently your code will
become at lot more readable

All ports are input at power-on.

Read datasheet all about TRIS registers if you want outputs.

Read the IOports section very carefully

hexreader · Sep 27, 2020

What the heck - this is like pulling teeth.

Reading datasheets and learning are clearly not your strong points. ( I see all of your posts on all forums)

Lets skip another 50 posts and go straight to the solution (LED lights on button push but never turns off until reset)

Code is untested, since I do not own a PIC18F45K80, so your job is to test it on real hardware and report back with success or failure.

Code:

/*
* File:   forum.c
* Author: hexre
*
* Created on 27 September 2020, 14:20
*/

#define _XTAL_FREQ 8000000

#include <xc.h>

// PIC18F45K80 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1L
#pragma config RETEN = OFF      // VREG Sleep Enable bit (Ultra low-power regulator is Disabled (Controlled by REGSLP bit))
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit (LF-INTOSC in High-power mode during Sleep)
#pragma config SOSCSEL = HIGH   // SOSC Power Selection and mode Configuration bits (High Power SOSC circuit selected)
#pragma config XINST = OFF       // Extended Instruction Set (Enabled)

// CONFIG1H
#pragma config FOSC = INTIO2    // Oscillator (Internal RC oscillator)
#pragma config PLLCFG = OFF     // PLL x4 Enable bit (Disabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
#pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power Up Timer (Disabled)
#pragma config BOREN = SBORDIS  // Brown Out Detect (Enabled in hardware, SBOREN disabled)
#pragma config BORV = 3         // Brown-out Reset Voltage bits (1.8V)
#pragma config BORPWR = ZPBORMV // BORMV Power level (ZPBORMV instead of BORMV is selected)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
#pragma config WDTPS = 1048576  // Watchdog Postscaler (1:1048576)

// CONFIG3H
#pragma config CANMX = PORTB    // ECAN Mux bit (ECAN TX and RX pins are located on RB2 and RB3, respectively)
#pragma config MSSPMSK = MSK7   // MSSP address masking (7 Bit address masking mode)
#pragma config MCLRE = ON       // Master Clear Enable (MCLR Enabled, RE3 Disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Overflow Reset (Enabled)
#pragma config BBSIZ = BB2K     // Boot Block Size (2K word Boot Block size)

// CONFIG5L
#pragma config CP0 = OFF        // Code Protect 00800-01FFF (Disabled)
#pragma config CP1 = OFF        // Code Protect 02000-03FFF (Disabled)
#pragma config CP2 = OFF        // Code Protect 04000-05FFF (Disabled)
#pragma config CP3 = OFF        // Code Protect 06000-07FFF (Disabled)

// CONFIG5H
#pragma config CPB = OFF        // Code Protect Boot (Disabled)
#pragma config CPD = OFF        // Data EE Read Protect (Disabled)

// CONFIG6L
#pragma config WRT0 = OFF       // Table Write Protect 00800-01FFF (Disabled)
#pragma config WRT1 = OFF       // Table Write Protect 02000-03FFF (Disabled)
#pragma config WRT2 = OFF       // Table Write Protect 04000-05FFF (Disabled)
#pragma config WRT3 = OFF       // Table Write Protect 06000-07FFF (Disabled)

// CONFIG6H
#pragma config WRTC = OFF       // Config. Write Protect (Disabled)
#pragma config WRTB = OFF       // Table Write Protect Boot (Disabled)
#pragma config WRTD = OFF       // Data EE Write Protect (Disabled)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protect 00800-01FFF (Disabled)
#pragma config EBTR1 = OFF      // Table Read Protect 02000-03FFF (Disabled)
#pragma config EBTR2 = OFF      // Table Read Protect 04000-05FFF (Disabled)
#pragma config EBTR3 = OFF      // Table Read Protect 06000-07FFF (Disabled)

// CONFIG7H
#pragma config EBTRB = OFF      // Table Read Protect Boot (Disabled)


void main(void){

    TRISC = 0;                                     // all output
    PORTC = 0b00000000;                            // LED connected to RC0 initialise to off
    PORTB = 0b00000001;                            // no idea what use this line is - hangover from how 8051 works probably
  
    ANCON0 = 0x00;                                 // digital inputs, not analogue
    ANCON1 = 0x00;                                 // digital inputs, not analogue

    while (1) {                                    // main loop
        if (RB7 == 0){                             // check switch if pressed - 0 when switch pressed, 1 when switch not pressed
            LATC0 = 1;                             // LED ON
            __delay_ms(40);                        // switch de-bounce time (seems long to me, I would have chosen 10ms)
            while(!RB7);                           // wait for release of switch
        }
    }
}

Djsarakar · Sep 27, 2020

hexreader said:
Code is untested, since I do not own a PIC18F45K80, so your job is to test it on real hardware and report back with success or failure.

I have tested your code and its not working so when I press button LED is not turning ON

Thread starter	Similar threads	Forum	Replies	Date
K	Pic Programming Board Jumper Instructions (Resolved)	Microcontrollers	6	Oct 23, 2024
	Looking for a very cheap development board with Bluetooth (BLE) and accelerometer built in.	General Electronics Chat	0	May 23, 2024
	Can anyone explain me the pH sensor board circuit.	Sensor Design & Implementation	8	Apr 14, 2024
	IMU evaluation/development board	Sensor Design & Implementation	4	Dec 18, 2023
	Development board with FPGA GW1N-LV9LQ144C6/I5	FPGAs (Field Programmable Gate Array)	3	May 2, 2023

PIC Development Board with PK3

Join our Engineering Community! Sign-in with:

PIC Development Board with PK3

JohnInTX

jpanhalt

JohnInTX

Djsarakar

Ian Rogers

JohnInTX

JohnInTX

Ian Rogers

Djsarakar

Djsarakar

Ian Rogers

Djsarakar

Ian Rogers

Ian Rogers

Djsarakar

Attachments

Ian Rogers

Djsarakar

hexreader

hexreader

Djsarakar

You May Also Like

Introduction to Phase/Frequency Detectors

Microchip Intros Hybrid MCU/MPU SIP for Human-Machine Interfaces

Rambus Introduces PCIe 7.0 Switch With Time-Division Multiplexing

Class AB vs. Class D: Understanding the Trade-Offs for Piezo Driver Design