For no good reason i'm trying to shave some wasted clock cycles out of my project.
I couldnt find any definitive answer on this in the datasheet, or on the microchip website, app notes, etc.
Every source specifies that when you turn on the ADC you have to delay for the holding cap to charge. But if I don't explicitly disable it, or re-enable it, and all i'm doing is changing channels, do i need to bother waiting?
If i think about this, to me it seems that when I change channels, i might want to wait until the voltage in the cap settles at the new voltage, which may be less time?
The Pic in question is a PIC16F1574, but i gather this would apply to all the enhanced mid-range chips.

Please if you want to tell me to read the datasheet, include the chapter and subsection, cause ive read the ADC section 5+ times and it is unclear to me.

 

Yep. You have to wait after changing channels to let the holding cap to charge/discharge to the signal level. The delay is spec'd such that if you wait the specified time, you get the specified accuracy. If the channels are close in voltage, the actual delay would be less but there is no real way of knowing so the spec is a catch-all that is necessary to observe if you want full accuracy over the full input range of multiple channels.

What I do is change channels immediately after reading one, go do something else then come back and start the conversion on the new channel.

 

Yep. You have to wait after changing channels to let the holding cap to charge/discharge to the signal level. The delay is spec'd such that if you wait the specified time, you get the specified accuracy.

That is exactly how I thought. Just going back over my program trying to validate every line i came to the delay, and i'm doing lots of channel changing. Couldnt find anywhere that explained the need to wait, and I cant remember how i came upon the need to wait in the first place. Must have been smart that day.
Thanks

 

That is exactly how I thought. Just going back over my program trying to validate every line i came to the delay, and i'm doing lots of channel changing. Couldnt find anywhere that explained the need to wait, and I cant remember how i came upon the need to wait in the first place. Must have been smart that day.
Thanks

I run a multi-channel ADC in a round-robin scheduler sort of thing that operates the ADC like I indicated earlier. Poll-poll-poll, change channel, poll etc. Each time a conversion is complete, I change the channel, save the conversion and set a flag indicating that the channel has a new value then go off to do something else. By the time I get back, the channel has settled and I can start another conversion. This method does not sample on equal time periods, I use a timer driven state machine for that but it works for lots of things. The main thing is that I don't wait around for the acquisition delay.

In practice, the aq delay and conversion time is pretty short. By the time I get back to the ADC, it is usually ready.

Good luck!

 

That is exactly how i'm going to eliminate the delay. I too have the ADC driven by a timer, with an interrupt set to read the value and assign it to a variable when complete. I just need to put the channel change behind this step, instead of in front of it, so that it has the entire timer cycle (way more than 5us) to settle. The datasheet was just leading me astray by not explaining what was going on.
Thanks for confirming my thoughts.