I am looking for any standards or recommendations for how much voltage can safely be applied across adjacent layers on a 4 layer PCB. There's loads of material out there on safe clearances between tracks but I can't seem to find anything relating to different layers. In this application, I would like to have 800Vdc on filled plane on layer 2 and then route some traces at 0Vdc on layer 1 above. Note that this is for functional isolation only, not safety critical.
I'm awaiting a reply from my PCB manufacturer to see if I need to go down the custom stack-up route but I thought I'd ask here for general advice in the meantime. Does anyone have any useful links?
I'm awaiting a reply from my PCB manufacturer to see if I need to go down the custom stack-up route but I thought I'd ask here for general advice in the meantime. Does anyone have any useful links?