PCB Design Review - SEEED XIAO carrier board

Thread Starter

bismuth

Joined May 8, 2024
2
Hello,
I have been working on designing a carrier board for a Seeed Studio XIAO microcontroller board. It is powered from a 5V source, and has on board 3V3 regulation. I have implemented a BSS138 level shifter (based on sparkfun/adafruit/NXP app note) for each pin to allow for full I/O compatibility at both 3V3 and 5V levels. I am designing in EasyEDA because I needed a free online solution for multiple devices.

I am hoping to get some feedback on the design before I go ahead and order the boards.
My biggest concerns would be the ground plane (bottom layer), the trace width, and general small mistakes that I may have made. I am inexperienced and have based this design off of similar online schematics.
Project link: https://oshwlab.com/stratos-ben/stratos-v2-board
Schematic:
Schematic_stratos-v2-board_2024-05-08.pngTop Layer Only:topLayer.pngBottom Layer Only:
bottomLayer.png

Thanks, I appreciate any help you can offer.
 

Irving

Joined Jan 30, 2016
5,013
Looks ok to me, though not followed every trace! Main comment I have is that there is a lack of high-frequency decoupling. You need 100nF MLCC on all chip VDD or VCC pins to GND. Three or four spread along the VCC & VDD rails of the level shifting array would be beneficial.

Why are you using a TO92 cased regulator rather than a SMT one, given you're using SMT caps?
 

Thread Starter

bismuth

Joined May 8, 2024
2
Thank you for your reply! I will be sure to add some more decoupling caps.

Why are you using a TO92 cased regulator rather than a SMT one, given you're using SMT caps?
My regulator (near the top right of the board) is in a SOT223 casing. The TO92 device is a DS18B20 temperature sensor, and I have selected this version for cost and stock reasons.
 
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