Optimization of the RC network around an AOP subtractor for constant current regulation

Thread Starter

Zebananos

Joined Jul 30, 2025
10
Hello everyone,

As a junior electronics student, I'm currently working on a constant current regulation using an AOP connected as a subtractor to drive a MOSFET of this type:
Circuit.PNG

My concern is that I've heard that the input capacitance of the MOS (Ciss/Qg) can disrupt the regulation and cause oscillations or unstable behavior in the control loop. For your information, here is the data for the MOSFET I plan to use:
Qc Ciss Mos.PNG
Unfortunately, I won't be able to test the schematic on a breadboard before mounting it on a PCB, even though that would be the best thing to do. I think it's possible to simulate it in simulation software, but I'd like your opinion before trying this option.

Would it be possible to have your advice/feedback on optimizing the resistor and capacitor network (placement, role, etc.) around this AOP to improve the stability (compensation, filtering, etc.) of the regulation without degrading it?

First of all, it seems to me that a resistor placed before the gate is essential, and a capacitor placed like this is often used as well:
compensation.PNG
I also saw that a snubber could be added, what does that mean?

For example, I found this constant current discharge assembly online, but I don't understand what C9 and R14 are for...
Oscillations.PNG

If any of you have already encountered this problem or have reference schematics, I'd be grateful.

Thanks in advance for your insight!
Zebananos
 

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Ian0

Joined Aug 7, 2020
13,097
First of all, DOES it oscillate? If not, don't worry about it. The op-amp does not necessarily see a capacitive load, because it sees the capacitor in series with the source resistor multiplied by Gfs. A resistor in series with the gate will make things worse not better as it puts a zero inside the feedback loop, which gives a pole in the overall response.
What current level do you intend to set, and how much voltage will there be across the MOSFET.
 

Thread Starter

Zebananos

Joined Jul 30, 2025
10
Thank you for your reply.


Unfortunately, since I can't test the assembly before ordering the PCB, I have no idea if it will oscillate. To avoid any risk, I'm trying to design a circuit that could mitigate any oscillations that might occur.


The current regulation will range from 10 mA to 20 A, thanks to four shunts switched per MOSFET. However, it will most often be used between 500 mA and 3 A. The drain-source voltage will be less than 5 V, since the batteries are all below 5 V (NiMH 1.2 V or Li-ion 4.2 V max).


So, placing a gate resistor between the op-amp and the MOSFET might not necessarily be beneficial. How can I verify whether it is useful in my case? I suppose the best approach would be either experimental testing or using a simulator, but I’m not sure if simulation tools allow checking for this kind of oscillation.
 
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