I don't see why I would need to change my nmos. It turns on and off perfectly fine atm, I don't see how a pmos would make it more efficient.

yes it would.
4V drop on N-chnnel source follower, 0.1V drop across a P-Channel. Loss is reduced by a factor of forty.

 

Hi TNW,
That last asc file you posted is not the circuit you show in post #18?
E

 

yes it would.
4V drop on N-chnnel source follower, 0.1V drop across a P-Channel. Loss is reduced by a factor of forty.

The voltage across the mostfet is determind by the current x Rds(on).
- The current I require will not change. I need 1 A regardless of mosfet.
- The RdsOn for pmos do not seem to be any less than that of a nmos. My nmos has 4.2 mOhm RdsOn, there are only five pmos in LTSpice that has a lower Rds than that.

@ericgibbs I removed the 1nF capacitor and added some internal resistance to the 470 capacitor but nothing major has changed and it still oscillates.

 

yes it would.
4V drop on N-chnnel source follower, 0.1V drop across a P-Channel. Loss is reduced by a factor of forty.

EDIT: The voltage across the mosfet should always equal (7.2 - 5.1) = 2.1V to keep Output voltage at 5.1V.
I don't know where you get 4V from? In my simulation I do get 5.1V on the output except it oscillates.

 

The voltage across the mostfet is determind by the current x Rds(on).

it is in the case of a common-source circuit (@crutschow ’s circuit) but it isn‘t in a common drain circuit (your circuit).

For a common drain circuit is the value of Vgs for the drain current, and that will be about 4V.

 

Hi,
Sims' One with fixed 1A resistive load and the other with 1A current.
E

 

If you had this schematic what changes would you make to prevent it from oscillating like it does?

You have a fundamental misunderstanding of your circuit.
As shown, it would only work as a hysteretic switching regulator, which normally functions by the transistor oscillating between full on and full off for high efficiency (which an N-MOSFET cannot do without its gate voltage being will above its source voltage).
The average value of the on and off voltage (PWM) is what determines the output voltage.

The instability you refer to is only with the feedback of a linear regulator, which yours is not.

So are you trying to make a linear regulator or switching regulator(?), because you seem confused about that.

 

I would suggest you look up “source follower” because you are using one and do not seem to understand its operation.

 

So at this point I'm just giving up.
I switched to a pmos and if anyone asks me why, I'll say I have no clue and they fail me in the subject.

This is how it looks right now and it seems to work pretty well, minus the high static noise on the output. (Which gets worse if I add a 1nF capacitor).


@BobTPH trying to look up source follower and you end up with a mosfet that looks nothing like the symbol in LT spice so the only port I can positivly identify is the gate.

@ericgibbs I dont understand how changing the resistor to a current source has such extreme consequenses on the frequency response. Nor do I understand why you added a 1V ac signal to the output feedback loop?
They are supposed to be the same. Instead of 5.1V over a 3.6Ohm resistor, I set the current to I = U/R = 1.4A ~ 1A, then the graphs should be identical. But they are not even close..

One issue I have with current pmos design is the massive 20mH coil.
If I change it to a more resonable 1mH then the voltage fluctuations becomes unbearable.


Isn't a 20mH inductor abit of a stretch when it comes to a simple stepdown voltage converter?
It will cause unnessecary interference with other components and introduce its own resistance, capacitance to my circuit.

Why is my circuit complete garbage while @crutschow works smoothly and repliably? They are basically the same at this point!

Oh and as for what type of converter I'm trying to make, I have no idea what it would classify as. But basically just a switch that turns on and off depending on if the output voltage if too high or too low. I'm guessing thats a switching regulator?

 

To clarify what I mean @BobTPH, if you look up source follower you'll get a schematic looking like this

The symbol used in the schematic Does not exist!
It is NONE of the available mosfet symbols.

 

That is because it is a JFET. Sorry for the bad steer, most articles I find are indeed about JFETs.

How about thinking about this. you original

The voltage across the mostfet is determind by the current x Rds(on).

Only when the voltage in the gate is higher than the voltage on the source by an amount given in the datasheet, usually 4.5V for logic level MOSFETs and 10V for ordinary ones.

The problem is that your circuit is unable to supply the nearly the 9V or so needed to get 5V at the source. I cannot think of a simpler way to say it.

With a P channel device, the gate voltage must be less than the source voltage by a similar amount. This is easy to achieve because the source is at 7.2V so the gate needs to be below about 2V or less, 0V works fine.

 

To clarify what I mean @BobTPH, if you look up source follower you'll get a schematic looking like this
View attachment 315373
The symbol used in the schematic Does not exist!
It is NONE of the available mosfet symbols.

That’s because source followers are applicable to any type of FET, JFET, enhancement and depletion MOSFET, so a generic symbol is used. It’s even labelled D, G and S, so what don’t you understand about it?
You might have to get used to the fact that not everyone draws MOSFETs exactly the same way, whether it is perfectly correct or not.

 

Nor do I understand why you added a 1V ac signal to the output feedback loop?

Hi,
LTSpice requires a 1Vac signal in the loop in order to calculate the Bode response plot of the circuit.

They are supposed to be the same. Instead of 5.1V over a 3.6Ohm resistor, I set the current to I = U/R = 1.4A ~ 1A, then the graphs should be identical.

The circuit does not give a 5.1V output in its present design, it is only 3.6V thats why I chose a 3.6R resistor to simulate your 1Amp current source.
E

 

think everyone here has gone entirely too far in providing You
with direct answers to a Homework-Assignment.
( which is not allowed by the Forum-Rules )

Hi, Low

The TS is not registered with AAC as a student, but as a Maker.

Moderation.

 

Hi TNW,
Please confirm.
Is this a Homework or College marked assignment/project.?
Or a personal project.
Moderation.

 

LowQCab.
If you have a doubt about a poster, you should raise a Report.

Moderation

 

Hi TNW,
Please confirm.
Is this a Homework or College marked assignment/project.?
Or a personal project.
Moderation.

It's school project. But it's not illegal to just take a schematic directly from the internet.
The point is that you should understand it and write a paper about it, which is why I posted it. To understand it.

And right now I don't understand how to combat the massive oscillations that appear on the output :/

 

And right now I don't understand how to combat the massive oscillations that appear on the output :/

Time to be blunt.
You have never stated exactly what type of regulator you are trying to build (do you know the difference between a switching regulator and a linear regulator?).
And as I have noted, the circuit you show would act like a hysteretic switching regulator.

Right now, what you have done would get a failing grade, since you have little understanding of your circuit or how MOSFETs work, and you seem to ignore most of what we say.

Below is an N-MOSFET source follower:
The output "follows" the input with the output voltage slightly lower than the Vgs threshold voltage of the MOSFET.
The only way to get that MOSFET to fully turn on, where you see the Rds(on) value, is if the In voltage is at least 10V above V1 for a standard MOSFET or 5V above the In voltage for a logic-level type MOSFET.+
Do you follow that (pun intended)?

 

Yes, now I see how a nmos works. I was told from the start that using nmos would be more power efficient that's why I tried to use it. I have no previous experience with mosfets at all so forgive my confusion. I do read everything you guys write, multiple times really! But it's still not as obvious as you might think..

And yes, now I see an nmos source will only output: Gate voltage - 2V (Vgs?)

Eitherway, good news! I've managed to create a functioning circuit using pmos instead. One that I understand completely!



As you can see it handles current changes up to 300Hz slopes without breaking from 5.1V.
I'd like to get the final trianglewave pattern smoothed out but it does not seem possible without destroying the feedback loop.

I think the peak to peak is within acceptable boundaries.

 

I'd like to get the final trianglewave pattern smoothed out

What's the purpose of R4, as that seems high if you are simulating the capacitor ESR.
Reduce that value and the ripple will be less.