Facebook
Google
GitHub
Linkedin
Op amp circuit design
- Thread starter Lewa129
- Start date
Too many unknowns, you need to give us something to work with.
Post your solution attempt.
EDIT: I thought this circuit looked familiar. You have started 4 threads for the same simple circuit. What's up with that??
https://forum.allaboutcircuits.com/threads/current-source-design.144632/
https://forum.allaboutcircuits.com/threads/current-source-design.144633/
https://forum.allaboutcircuits.com/threads/current-source-design.144639/
Post your solution attempt.
EDIT: I thought this circuit looked familiar. You have started 4 threads for the same simple circuit. What's up with that??
https://forum.allaboutcircuits.com/threads/current-source-design.144632/
https://forum.allaboutcircuits.com/threads/current-source-design.144633/
https://forum.allaboutcircuits.com/threads/current-source-design.144639/
Sorry about that. I needed to submit the solution today and couldn’t figure it out. Can you verify if what I’ve done is right? Thanks
If the emitter has 30 V on it, what would the voltage at the base be?
If the opamp is putting out 35 V (which is Vcc), that means (1) that you are using an opamp that can truly operate rail-to-rail, and (2) your opamp is saturated. Is that how you want it to operate?
What is the purpose of R1? Even an opamp with a rail-to-rail output couldn't get to it's positive supply; assuming you could find one that would operate at 35V.
A voltage drop of 30V across the current sense resistor doesn't leave much voltage for the load.
We won't do the work for you; it's you're homework.
Hi,
Real quick i see a mistake, although we dont yet know what the heck R2 is. Is that the load?
The mistake is when you subtracted 35-29.3 which looks like you first subtracted 0.7 from 30 which is not correct you have to add that to 30, thus you get 35-30.7 which is then less voltage across R1 which is then less current into the base which is then less output current if you design this right up to the sheer edge of reason (beta being perfectly 200 always).
In practice you would not be able to assume 0.7v base emitter drop with such a high current, but let's forget about that for now.
In practice you also would not design right up to the exact beta (200) you would design this to work lower (like beta=100) so the forced beta is lower than the expected beta. That way you know it will work for different transistors of the same part number but slightly different betas as well as other variations that can occur. But let's forget about that for now too.
You're still left with calculating the base current correctly. Try that again and see what R1 you can come up with this time.
You should also tell us what R2 is.
Real quick i see a mistake, although we dont yet know what the heck R2 is. Is that the load?
The mistake is when you subtracted 35-29.3 which looks like you first subtracted 0.7 from 30 which is not correct you have to add that to 30, thus you get 35-30.7 which is then less voltage across R1 which is then less current into the base which is then less output current if you design this right up to the sheer edge of reason (beta being perfectly 200 always).
In practice you would not be able to assume 0.7v base emitter drop with such a high current, but let's forget about that for now.
In practice you also would not design right up to the exact beta (200) you would design this to work lower (like beta=100) so the forced beta is lower than the expected beta. That way you know it will work for different transistors of the same part number but slightly different betas as well as other variations that can occur. But let's forget about that for now too.
You're still left with calculating the base current correctly. Try that again and see what R1 you can come up with this time.
You should also tell us what R2 is.
| Thread starter | Similar threads | Forum | Replies | Date |
|---|---|---|---|---|
|
Logic D | Homework Help | 53 | |
| S | Circuit design for battery backup | General Electronics Chat | 10 | |
|
Pre-Amp Circuit Design For Piezo-Electric Disk | Analog & Mixed-Signal Design | 17 | |
| T | analog IC design in the submicron technology (12nm<L<180nm) | IC Design | 0 | |
| V | IR2111 Circuit design for Half bridge control ..#2 | General Electronics Chat | 3 |
