Hello I try to make a circuit reacting on negative pulses (at label pick)( pulses larger than 10V negative) and generating a logical H at OUT2 which remains H during 1mS by locking out following entering triggers.
I would like the H puls to be at least 0.5mS long. I made an LTspice sim, but I dont find how to realise this lockout and OUT2 H-lenght. Left part is an existing circuit until the signal "pick". All modifications should be at the right part of it (U1 and 2). Any body can help me? Thanks

 

If you can translate the words in the simulation to English, I'll take a look at it.

 

If you can translate the words in the simulation to English, I'll take a look at it.

Hello, It is not relevant to the file or the simulation. It is a part of a course on Op Amps that I copied in the file.

 

How long do you need this "lockout" of incoming pulses?

 

How long do you need this "lockout" of incoming pulses?

Thanks for willing to take a look at it Crutschow! 1mS, and small pulses <10V negative shouldnt trigger at all. H pulse length can also be 1mS. This will make it easier I guess.

 

Can nobody give me a hint??

 

What is the purpose of R5 and C2, and R9 and C3? The LM324 has a totem-pole output stage, not open-collector. This means that OUT1 will overpower R5 and C2, and OUT2 will overpower R9 and C3. These are supposed to be the timing circuits, they will not work as intended.

ak

 

What is the purpose of R5 and C2, and R9 and C3? The LM324 has a totem-pole output stage, not open-collector. This means that OUT1 will overpower R5 and C2, and OUT2 will overpower R9 and C3. These are supposed to be the timing circuits, they will not work as intended.

ak

Thanks for info. I have changed the diagram as included and made the sim faster. What's the right way to realize the 1mS one shot and lock out.
pulse at 700µS should not trigger.

 

The way I understand your requirements and your drawing is this:

1.When the input goes more than 10 volts below ground, you want an output pulse that goes 5 V above ground.

2. Even though the output pulse width is 0.5 ms, you want the input locked out for 1.0 ms.

If this is correct, then you actually want two monostables, one for the output pulse and one to inhibit the input. But what I think you want is just a single true monostable, one with positive feedback to disable the input during the timing pulse.

What is the input signal? Your drawing is not clear. Post #3 is wrong. The text is very important. Please translate it.

ak

 

The way I understand your requirements and your drawing is this:

1.When the input goes more than 10 volts below ground, you want an output pulse that goes 5 V above ground.

2. Even though the output pulse width is 0.5 ms, you want the input locked out for 1.0 ms.

If this is correct, then you actually want two monostables, one for the output pulse and one to inhibit the input. But what I think you want is just a single true monostable, one with positive feedback to disable the input during the timing pulse.

What is the input signal? Your drawing is not clear. Post #3 is wrong. The text is very important. Please translate it.

ak

missed this anwer. Please also refer to my answer #8 of previous post. (new diagram too)
1/ correct.
2/ The one shot lenght and lockout should be 1mS.
(Text is not important. Its a part of a course for beginners on opamps I simply copied)

 

Here is a classic monostable circuit. Because of positive feedback from the output to one of the inputs, the other input is "locked out" during the timing period.

ak

 

Here is a classic monostable circuit. Because of positive feedback from the output to one of the inputs, the other input is "locked out" during the timing period.

ak
View attachment 133961

Thanks, I'll try that instead of the 2 opAmps.

 

Note that the circuit I posted will *not* tolerate inputs that go below GND or above Vdd. The good news is that because the feedback and the trigger are two inputs to a gate, the lockout happens in nanoseconds with no need for a delay.

The capacitor needs 5 time constants to discharge 99% before the next cycle. If a trigger comes in sooner than that, the output pulse will not be full width. You can reduce the recovery time by placing a small signal diode (1N914, etc.) in parallel with Rt, anode to GND.

ak

 

Note that the circuit I posted will *not* tolerate inputs that go below GND or above Vdd. The good news is that because the feedback and the trigger are two inputs to a gate, the lockout happens in nanoseconds with no need for a delay.

The capacitor needs 5 time constants to discharge 99% before the next cycle. If a trigger comes in sooner than that, the output pulse will not be full width. You can reduce the recovery time by placing a small signal diode (1N914, etc.) in parallel with Rt, anode to GND.

ak

THanks for info but I dont understand: "will *not* tolerate inputs that go below GND". How can I make it function then? By replacing the first nand by an opAmp?

 

Not by replacing, but by putting something (opamp, common base transistor stage, etc.) in front of the monostable. If you don't need precise negative voltage level detection, you can do it with two resistors and one or two diodes.

You say you want the monostable to trigger when the input is below -10 V. What are the worst case negative and positive voltages the input signal can reach?

ak

 

Not by replacing, but by putting something (opamp, common base transistor stage, etc.) in front of the monostable. If you don't need precise negative voltage level detection, you can do it with two resistors and one or two diodes.

You say you want the monostable to trigger when the input is below -10 V. What are the worst case negative and positive voltages the input signal can reach?

ak

-40V is worst case;positive +20V;

 

I can't draw a schematic right now, so here it is in text.

33K resistor from gate input to +5 V
1N914 diode from gate input to +5 V (anode to input, cathode to +5 V)
1N914 diode from gate input to GND (anode to GND, cathode to input)
110K resistor from gate input to external signal.

Ignoring the diodes, the resistors form a voltage divider between +5 V and -10 V (the detection level. The negative-going transition level of a 4093 is Vdd/3, or 1.33 V. Using Ohm's Law, you can calculate the resistor values for this voltage divider. The diodes prevent input overvoltage conditions that can damage the chip.

ak

 

I can't draw a schematic right now, so here it is in text.

33K resistor from gate input to +5 V
1N914 diode from gate input to +5 V (anode to input, cathode to +5 V)
1N914 diode from gate input to GND (anode to GND, cathode to input)
110K resistor from gate input to external signal.

Ignoring the diodes, the resistors form a voltage divider between +5 V and -10 V (the detection level. The negative-going transition level of a 4093 is Vdd/3, or 1.33 V. Using Ohm's Law, you can calculate the resistor values for this voltage divider. The diodes prevent input overvoltage conditions that can damage the chip.

ak

Thanks for the advise ak; It's the case without Opamp or transistors yr describing I presume. I' tried to sim it . Out2 stays same level. No lock out. Did I misunderstood? Have tried different RC value.

 

If you want to trigger an output pulse with a negative input, you can do it with a comparator. But it might not be what you need because I dont know the requirements for your assignment. This is my approach if I understand correctly, which is different but if you want you can read it

When the comparator gets on its positive input (U+) a voltage of "-10V" and on its negative input (U-) a voltage of "-12V" it will output the power supply for the positive input. You put on the positive power supply "5V" and you will get "5V" on the output when the positive input (U+) is higher.

With 2 operational amplifiers you can inverse the "-10V" so they can become "+10V" then output them on a second operational amplifier wired as a schmit trigger. That way the schmit trigger will output "5V" when it gets "10V" on the input and until the voltage on the input drops from "10V" to whatever is the lower border, it will pass "1ms" or as much as you want.

Or you could invert the voltage to "10V" input it to a comparator with "5V" and "0V" power supply and just keep it on for as long as you want with a "555 timer" or any multivibrator.

 

D1 is backwards.