Very Good!! It is obvious that you are not a beginner! The design is great in it's simplicity. The complex part is in the PIC device coding.

Yes- and thank you.

I'm totally new to circuit theory and design, but this clock circuit looks to be what I might need. Like many in this thread, I have an old IBM slave clock. It was my grandfather's who was an IBM service technician. Many years ago, a work colleague devised a circuit with several counter chips that used the AC cycles out of a wall socket to trigger a transistor that supplied a 1 sec pulse to the clock every 59 seconds. It worked great for many years but then started misbehaving, erratically gaining time. I did some troubleshooting and (I think) determined that a "divide by 5/6" switch in one of the counters was malfunctioning. I thought that the switch input was not properly grounded so I redid some re-soldering and chip reseating to make sure the connections were good. That didn't work. Then I thought that maybe the whole circuit ground was floating and that the counter input wasn't getting a consistent 0V, so I connected the 0V side of the circuit's transformer to the grounding spade of my wall plug. That seemed to work...for a while. So maybe the counter chip(s) are just past their prime. Regardless, Sensacell's circuit looks to be much more accurate with the use of the crystal instead of using AC cycles. The part I am unclear about is what coding is required in the PIC? How is this accomplished? Is is possible for Sensacell to provide source code? Sorry if all of this doesn't make that much sense.

 

I'm totally new to circuit theory and design, but this clock circuit looks to be what I might need.

Rather than hijack this thread (an admittedly heavy-handed term), better to start your own thread with your own question, and reference this thread with a link.

Do you have access to a small power transformer with a secondary somewhere between 8 Vac and 18 Vac?

Where are you located?

ak

 

Rather than hijack this thread (an admittedly heavy-handed term), better to start your own thread with your own question, and reference this thread with a link.

Do you have access to a small power transformer with a secondary somewhere between 8 Vac and 18 Vac?

Where are you located?

ak

AK,
I am new to these forums, too, so will need to learn the best way to utilize them that follows established norms. Thanks for starting this new thread. As for location, I am in Wisconsin. The current circuit design I referenced in my initial post does have a transformer that spits out 12VAC/24VAC. Do you have an alternate circuit design to Sensacell's?

 

Link to the old thread - ?

 

hi,

Mod: link to old thread.
https://forum.allaboutcircuits.com/...o-work-without-a-master-2.207275/post-1990570

and

https://forum.allaboutcircuits.com/...it-to-work-without-a-master.51286/post-340183

 

a work colleague devised a circuit with several counter chips that used the AC cycles out of a wall socket to trigger a transistor that supplied a 1 sec pulse

Do you have the schematic for that circuit?

 

Do you have the schematic for that circuit?

I made a sketch back in 1992. A scan is attached. I am not a EE, rather a ChemE, so I don't think my sketch would qualify as a schematic. I worked in industrial plants for 40 years designing, installing, and maintaining instrumentation and related equipment used for process control and safety systems. I say this not as some kind of brag, but just as background and possible explanation for my "style" of drawing. The actual board was assembled back in 1988 and worked as designed. Then it started gaining time. That's when I zeroed in on the "divide by 5/6" input which explained what I was actually observing with the clock. At first I thought I had found the issue, but then it reverted back to its old erratic behavior, so maybe my "success" was random chance.

 

Overall, that is the non-microcontroller approach. Power line as the timebase > dividers > transistor driver. Plus a low-current voltage regulator or two. There is no need for an opto-coupler. Also, the circuit is running the CMOS chips dangerously close to their max operating voltage. And it looks like the circuit puts over 30 V across the clock coils.

The CD4566 / MC14566 divider is way obsolete, but the divide-by-60 function can be done other chips (maybe the MC14569). I can work up a schematic later, but someone probably will beat me to it.

ak

 

This is a first-pass re-draw of your old schematic. It shows all of the connections that are listed in the "jumpers" table on the original. This should make the functioning of the circuit more clear.

To make the circuit easier to discuss, I gave the components reference designators. I also added decoupling capacitors for the ICs.

U3A, B, C act as a 4-input AND gate to decode the value 59. The output at pin 8 goes high for one second before the counter rolls over to 0. Alternative parts are the CD4082 dual 4-input AND and the CD4012 dual 4-input NAND.

There is no GND connection in the output transistor circuit (the secondary side of the optocoupler) because it is completely floating. This extra layer of isolation is unnecessary, because the entire timing circuit already is isolated from earth ground by T1.

The circuit should work fine, but it has some things not considered best practices. The monostable and unused AND gate inputs are unterminated. The U1 CLK-B input has no pull-down resistor, so the input floats when D1 is reverse-biased. The low voltage power supply is dangerously close to the maximum rated operating voltage of the IC's, and unregulated. The high voltage supply puts about 34 V across the clock coils, which might exceed their rating.

Separate from that, the biggest problem is that the 4566 chips are way obsolete. The pair of them plus the AND gates have only one function - produce a 1-second pulse every 3600 powerline cycles. Fortunately there are many ways to do this with contemporary parts, while eliminating diode bridge D3 and optocoupler U4.

Click on the schematic for a larger image.

ak

 

the 4566 chips are way obsolete.

But they still are available.

So I would try adding a 10kΩ resistor from U1-15 to ground, grounding all unused IC inputs, and add a 7815 regulator for the VCC power, and see if the circuit then works properly.

 

But they still are available.

I tried various combinations of the part number prefixes and suffixes on DK, Mouser, Newark, and Jameco - nuttin.

So I would try adding a 10kΩ resistor from U1-15 to ground,

Of all of the little issues, this is the most likely.

ak

 

I tried various combinations of the part number prefixes and suffixes on DK, Mouser, Newark, and Jameco - nuttin.

Yes, I apparently looked up the wrong part number.

 

First off, thank you both very much for taking the time to look at this. It is very much appreciated. I have spent some time reviewing the drawing and your suggestions and have a couple of comments/questions:

1.) I have datasheets for the timer and AND-gate chips if that would be of any use. They are not originals, but rather ones I pulled off the web probably in the early 2000s so were still available-ish.

2.) There is a part of the schematic on the bottom right that shows VCC and three parallel capacitors tied to ground. I don't have that on my sketch/wiring diagram so am curious what it represents.

2.) I annotated the drawing to show what I think is your major recommendation. Did I show it correctly? I also show where I connected earth ground to the circuit in my earlier troubleshooting attempts. I don't know if this changes anything.

3.) Since the circuit worked for some years before becoming erratic, do you have a theory on what has failed and/or degraded to cause the misbehavior?

4.) Ultimately, I would like to get the clock reliably and accurately functioning again. I am agnostic as to whether the best path to this is ultimately by modifying/repairing the existing circuit or starting fresh with current parts.

5.) If I need to buy parts, where is the best place to shop given the quantities will be ones-twosy? I've used Mouser and Digi-Key before but don't know if they're the best.

6.) I have also attached a couple of photos of the clock works and label.

Thanks again for all of your time helping a newby.

 

The first thing I would try is adding a 10kΩ resistor from U1-15 to ground (Post #9 schematic), as the lack of any DC path to ground at that input could definitely cause erratic triggering.

 

First off, thank you both very much for taking the time to look at this. It is very much appreciated. I have spent some time reviewing the drawing and your suggestions and have a couple of comments/questions:

1.) I have datasheets for the timer and AND-gate chips if that would be of any use. They are not originals, but rather ones I pulled off the web probably in the early 2000s so were still available-ish.

We already have those. The problem isn't the data, it's that those parts are no longer made.

2.) There is a part of the schematic on the bottom right that shows VCC and three parallel capacitors tied to ground. I don't have that on my sketch/wiring diagram so am curious what it represents.

Those are power supply decoupling capacitors for the three ICs. For each chip, one cap should be as close as possible to the power and GND pins, with short leads.

2.) I annotated the drawing to show what I think is your major recommendation. Did I show it correctly?

Nope. Tying pin 15 to GND kills the 60 Hz clock signal coming from the transformer. Connect pin 15 to GND with a 10K resistor.

I also show where I connected earth ground to the circuit in my earlier troubleshooting attempts. I don't know if this changes anything.

It doesn't and could cause an unexpected problem. The entire circuit is intended to be completely floating - not tied to earth ground in any way. I vote to remove that connection.

3.) Since the circuit worked for some years before becoming erratic, do you have a theory on what has failed and/or degraded to cause the misbehavior?

Gaining time means that either a) one of the divide-5/6 pins is not reliably grounded; b) a bad solder joint somewhere in the logic gates or transistor circuit; c) noise on the U1 clock input. This could be due to the chip's input stage threshold voltage drifting with time, or increased power line noise getting through T1 with enough energy to trigger U1. I suggest an expansion of Carl's response:

Let's label the pin 15 added resistor R5
1. Increase R1 to 1 K
2. Decrease R5 from 10K to 4.7K
3. Add a 0.1 uF capacitor in parallel with R5 from pin 15 to GND
This should attenuate some powerline noise without affecting the intentional clock signals.

4.) Ultimately, I would like to get the clock reliably and accurately functioning again. I am agnostic as to whether the best path to this is ultimately by modifying/repairing the existing circuit or starting fresh with current parts.

As I said before, there is nothing wrong with the circuit approach. I would take anther run at fixing it before jumping into a new build.

5.) If I need to buy parts, where is the best place to shop given the quantities will be ones-twosy? I've used Mouser and Digi-Key before but don't know if they're the best.

I think Mouser and Jameco are a bit cheaper for very low volumes. Others around here have their favorites.

ak

 

Sorry, my first annotated drawing didn't show a resistor in the U1 P15-to-ground connection. I understood it was a requirement just didn't get it drawn in my PDF editor (wish I still had access to CAD). Anyway, I've annotated the drawing again to show what I think is your recommendation. A couple of other questions:

1.) What is the best way to ground the unused IC pins? Short wires to a 0V "rail"?
2.) I looked at some data sheets for the 7815 voltage regulator. Part number AMSRL-7815-NZ looks like the most straightforward (wired in series with VCC+) but the data sheet shows an example schematic with quite a bit more going on. Is that all required?
3.) Regarding the decoupling capacitors, what are they decoupling? Sounds like if the capacitor leads are long enough I would just short the VSS/VDD pin to the VSS/GND pin wit the capacitor for each IC, correct?

Thanks.

 

Sorry, my first annotated drawing didn't show a resistor in the U1 P15-to-ground connection. I understood it was a requirement just didn't get it drawn in my PDF editor (wish I still had access to CAD). Anyway, I've annotated the drawing again to show what I think is your recommendation. A couple of other questions:

1.) What is the best way to ground the unused IC pins? Short wires to a 0V "rail"?
2.) I looked at some data sheets for the 7815 voltage regulator. Part number AMSRL-7815-NZ looks like the most straightforward (wired in series with VCC+) but the data sheet shows an example schematic with quite a bit more going on. Is that all required?
3.) Regarding the decoupling capacitors, what are they decoupling? Sounds like if the capacitor leads are long enough I would just short the VSS/VDD pin to the VSS/GND pin wit the capacitor for each IC, correct?

Thanks.

Arghh... corrected capacitor reference on annotated drawing.

 

I'm working up an updated schematic with the recommended changes.

It turns out that all of the unused inputs can be tied to GND. Sometimes you have to terminate something high, but not in this circuit.

Power supply decoupling: One of the fundamental assumptions in circuit analysis is that voltage sources are theoretically perfect, when in fact they have a complex output impedance. This makes the IC that is being powered the shunt leg of a voltage divider, with the supply's output impedance as the series leg. This means that as the current through the chip changes as it does whatever it is doing, the voltage at its power pin changes. This can cause all kinds of problems, such as audio circuits breaking into oscillation for no apparent reason. In digital logic chips it can cause false triggering, unintended oscillations (again), etc. The simple solution is to add a capacitor in parallel with the chip. It is a combination lowpass filter and energy store.

In the sixties, decoupling per-chip was rare; decoupling was more of a global thing, with a few caps sprinkled around a large board area. In the seventies, digital logic boards got more dense and a lot faster, and problems happened. By the 80's, having one 0.1 uF ceramic cap per chip became the minimum. If you look at the underside of a modern CPU motherboard with some giant, multi-core processor blasting away, you will see something like 20 to 50 small ceramic caps on the underside, directly below the CPU.

ak

 

Thanks for the explanation about decoupling. I now understand the reason for including the caps at each chip.

 

The label is hard to read in a photo. Do you have any information about the current required by the coil? Impedance / resistance / wattage - ?

And, how many clocks will you be driving?

Also, do you already have the transformer? Is it part of some kind of device or assembly?

ak