odd-even counter jk flip flop with control entrance

Thread Starter

TzoIt

Joined May 16, 2016
5
I am trying to build a circuit with jk flip flops that counts 0-2-4-6-0 when input x=1 and 1-3-5-7-1 when x=0.

I've made the state table and have found the J and K inputs according to the excitation tables, but I am not sure if I am correct, because I do not understand how the x input is connected to the flip flops, since it does not appear in none of the equations. Any hints please? Thanks!

Here are some photos with my efforts so far
 

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HW-nut

Joined May 12, 2016
97
You need to add 'x' to state transition table. The table should contain 'x', the 3 sets of JK inputs for each counter bit and the 3 FF outputs.
 

Thread Starter

TzoIt

Joined May 16, 2016
5
I have done that,if you check out the attached files. The last one is the state transition table and the others the karnaughs for each FF. I am not sure it is correct though. I can't figure out how to design it.
 

HW-nut

Joined May 12, 2016
97
When you simplify the Jk inputs to go from the current state to the next state, 'x' needs to be included so the logic driving the inputs would need the 3 outputs and the current state of 'x'.
 

Thread Starter

TzoIt

Joined May 16, 2016
5
I know that, i have all the combinations of states,including the indifferent ones. But the input equations don't make sense to me so that I can draw the circuit.

I find:
J1=Q2 K1=Q2
J2=1 K2=1
J3=0 K3=Q1Q2

The x input is simplified with the karnaugh maps, so it does not appear in any JK input. That is why I think I'm making a mistake.
 

HW-nut

Joined May 12, 2016
97
Obviously, x must be in the result. I'll give it a try and see what I find for a solution. I suspect there is an error in the maps, however, I have always used the tabulation method for simplification so I'm much help with the maps.
 

WBahn

Joined Mar 31, 2012
29,978
You only need two FFs and the X input doesn't affect them at all.

Write the binary sequences for both the odd and the even sequences and look at what is the same and what is different between them.
 

HW-nut

Joined May 12, 2016
97
One thing I did notice in your state transition table is that you transition to an undefined state when x=1 (or 0) if the current state is invalid for the count type. I think this is where the don't cares are coming into play. I suggest updating the transition diagram so that if x is invalid for the present state, transition to a valid state based on the value of x.

Hope this helps.
 

djsfantasi

Joined Apr 11, 2010
9,156
Sometimes Karnaugh Maps and State Tables are the only and correct tools for the job. Sometimes intuition or insight can work too. @WBahn has some excellent insight for you
 

HW-nut

Joined May 12, 2016
97
You only need two FFs and the X input doesn't affect them at all.

Write the binary sequences for both the odd and the even sequences and look at what is the same and what is different between them.
I do understand what you are suggesting but I would expect that the homework intent is a synchronous counter which would require 3 FF's.
 

WBahn

Joined Mar 31, 2012
29,978
I do understand what you are suggesting but I would expect that the homework intent is a synchronous counter which would require 3 FF's.
It's hard to tell the homework intent on a point such as this. If we had a better awareness of the context within which it was given we might have a better feel. The "best" solution would probably be to offer up both solutions along with a couple sentences comparing the two.
 

Thread Starter

TzoIt

Joined May 16, 2016
5
Thank you both guys. Yes, WH-nut is right, the course where the homework was given is about synchronous circuits, so his suggestion fits better. Although WBahn and djsfantasi made a good point.
 

dl324

Joined Mar 30, 2015
16,846
Any hints please?
I see an error in the last row of your excitation table for K3. I also think the way you've inserted don't cares for the invalid counts isn't giving valid Kmaps. Using the next to last row in your excitation table, you would get
X 0 X 0 1 X and the 0's would prevent 'x' from being dropped from the min terms for K1 and K2.

I chose to use outputs that would have the counter count out of invalid states on the next clock and I came up with 'x', or it's complement being used for all J/K inputs.
 
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