The cct works perfectly in the real world except for power on activiation. Any ideas on how I can prevent the relay or the timing cct for that matter to run when I first apply power even though the trigger switch is open. It also makes no difference if the trigger switch is held high or low. It will still activate on power up.

 

I've not simulated this but try it; it should work.

On the second NOR gate, connect 1 input to +12v with a capacitor and a resistor to ground. When you switch on the input is pulled up to +12v by the capacitor so the output is held low disabling the relay. The new capacitor eventually charges up and that input is then effectively held low by the new resistor, playing no further part in the proceedings until the capacitor is discharged by powering the circuit down. The time constant of Rnew.Cnew must be longer than the 1k . 10uF pair to ensure the 10uF is discharged first. You'll need to experiment but 100u & 1k should work.

 

Put this circuit between the one shot output and transistor base resistor:

Set the time constant to be longer than the one shot period.

If you have spare NOR gates, you might be able to use them instead.
EDIT: Can. Just use DeMorgan's Theorem on the AND gate.

 

Unrelated to the power-up problem, but a pull-down resistor from the switch to ground would ensure that the 100nF cap can discharge when the switch opens.

 

Here's a NOR gate solution (assuming you have 2 unused gates):

 

WOW, Ok, I'm blown away by all the possibilities. I saw Irvings first and tried it. It works, used what I had next to me 22uF and 6.8K. All seems good. I have attached a screenshot for anybody else who may need this kind of a solution.



Thanks Irving.
Thanks dl324 on the and solution but at the moment I can use the existing nor gates, though isn't your second option the same as Irvings only using the extra gates.
Thanks Alec_t I'll look into it.

Thanks everyone. Outstanding!

 

Thanks Irving.

You're welcome Paul. Enjoy.

 

though isn't your second option the same as Irvings only using the extra gates.

Both options required more gates. You didn't provide bounds for solution space, so I didn't consider modifying the one shot.

Regarding your schematic drawing style. We always draw the ground symbol pointing down and we avoid unnecessary wire jogs. Instead of further loading the output of a logic gate, it would be better for you to put the indicator LED in parallel with the relay coil.