http://labdeeletronica.com.br/en/eletronicaanalogica/porta-logica-or-com-ci-555/
IMPORTANT: You will better understand the motivation behind the creation of this circuit by accessing the URL above.
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This is just to show, in an educational context, that the 555 IC can be used for much more than its common monostable, bistable, or astable configurations. In fact, it's possible to simulate all logic gates using one or multiple 555s, even to the extent of assembling an entire educational computer using several (many) 555 ICs.For what purpose does this Circuit need the 555 Chip ?
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It's perfectly possible to simulate the same logic gate without using the 555 IC, but studying how things happen internally within the IC to produce the OR logic gate behavior is an interesting exercise.For what purpose does this Circuit need the 555 Chip ?
Technically you've shown aTurn the classic 555 timer into an OR logic gate
Appears to me if either button is pressed the output goes high but only as long as the switch is pressed.
Is that the purpose?
The circuit correctly matches the truth table of the OR logic gate.Welcome to AAC!
Technically you've shown a NOR gate. In a poorly drawn schematic.
As demonstrated by the circuit in operation, it functions as an OR gate.Looks like a NOR gate.
Not convinced.
What do you consider a high output on the 555?
No.As demonstrated by the circuit in operation, it functions as an OR gate.![]()
I understand what you mean... You are referencing the supply voltage at the Trigger and Threshold pins. However, consider using the input buttons as a reference. That is, when both are open, the output is zero, and when at least one of them is closed, the output is 3.3V.No.
When both inputs are open (logic high), the output is low, and when you ground either one (or both) of the inputs, the output goes high.
That's a NAND gate function.
The "behavior" of logic gates can be achieved even with entirely mechanical systems where there are no voltage levels. In electronic circuits, the voltage levels assigned to low or high logic levels are purely conventions, which, in the case of traditional ICs using TTL and CMOS technology, have been somewhat standardized. However, this does not mean that any circuit exhibiting the behavior of a logic gate must necessarily follow these "standardized" values. It is perfectly possible to assign different values for high and low logic levels, as long as this is clearly specified in the project documentation.I understand what you are saying, but if you use the term "logic gate" then you must use logic gate conventions.
Then you don't need the 555 for that.this is just an educational circuit designed to observe the output behavior according to the states of the input switches...considering an open switch as a low logic level and a closed switch as a high logic level.
NANDThe circuit correctly matches the truth table of the OR logic gate.