I have this as a net file....

* Schematics Netlist *


VIN 1 gnd PULSE (OV 1V 0S 150pS 150pS 500pS 1nS)
.MODEL NMOS NMOS (LEVEL=2 TOX=30e-10)
.MODEL PMOS PMOS (LEVEL=2 TOX=30e-10)
M1N 2 1 gnd gnd NMOS W=1.2um L=0.6um
M1P 2 1 vdd vdd PMOS W=2.4um L=0.6um
M2N 3 2 gnd gnd NMOS W=2.4um L=0.6um
M2P 3 2 vdd vdd PMOS W=4.8um L=0.6um
vdd1 gnd 0 0V
vdd2 vdd gnd 1V
.TRAN 0nS 1nS
.PROBE v(1) v(2) v(3)
.END

... but when i try to simulate.. it says i have a error.. this is my output file...


.OP
.STMLIB "271.stl"


* From [PSPICE NETLIST] section of pspiceev.ini:
.lib "nom.lib"

.INC "271.net"

**** INCLUDING 271.net ****
* Schematics Netlist *


VIN 1 gnd PULSE (OV 1V 0S 150pS 150pS 500pS 1nS)
-----------------$
ERROR -- Missing value
.MODEL NMOS NMOS (LEVEL=2 TOX=30e-10)
.MODEL PMOS PMOS (LEVEL=2 TOX=30e-10)
M1N 2 1 gnd gnd NMOS W=1.2um L=0.6um
M1P 2 1 vdd vdd PMOS W=2.4um L=0.6um
M2N 3 2 gnd gnd NMOS W=2.4um L=0.6um
M2P 3 2 vdd vdd PMOS W=4.8um L=0.6um
vdd1 gnd 0 0V
vdd2 vdd gnd 1V
.TRAN 0nS 1nS
.PROBE v(1) v(2) v(3)
.END

**** RESUMING 271.cir ****
.INC "271.als"

it says im missing a value.. please help..
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edit: this was a sample problem.. and i cant even get it to work.. i copied it word for word =(

 

i figured it out.. typed O instead of 0...

heres another question.. say i made a net file.. is there anyway to display a equivalent schematic for it?

 

i figured it out.. typed O instead of 0...

heres another question.. say i made a net file.. is there anyway to display a equivalent schematic for it?

Nope, you can't go the other way. Or after 5 years of using this thing I haven't figured out how to as of yet or seen a option allowing me to do so.

 

you think for such a intricate program that it wuld let you reverse ur netlist into a circuit diagram....

 

you think for such a intricate program that it wuld let you reverse ur netlist into a circuit diagram....

It's a little like trying to turn applesauce back into apples...
Agilent ADS can create a schematic from an imported netlist, but it is just a bunch of components with net names on all ports. Not much more intelligible than the netlist. Making it smart enough to place the components in some sensible, pleasing order and then connect them with wires would be quite a feat, although it might not be any more difficult than an autorouter for PC board layout.