Hello everyone...
I will really appreciate it if someone will just help me with this part of my assignment of designing an IC using CMOS sub-system...

The question is:
The Logic combination below, I want it to be designed ONLY by 2-Input NAND gates? or Using 2-Input NOR gates!

Thanks to everyone...

http://i539.photobucket.com/albums/ff351/smo0or/Logicgates.jpg

 

First, don't expect from someone to make the whole circuit fir you.

Start with the first term, B'C'D', and make it by using NAND gates. Actually, the first term is a AND gate with NOT gates on its inputs. Make it this with NANDs.

Then make the same with the second term and so on. Finally, OR all the previous circuits together.

 

First, don't expect from someone to make the whole circuit fir you.

Start with the first term, B'C'D', and make it by using NAND gates. Actually, the first term is a AND gate with NOT gates on its inputs. Make it this with NANDs.

Then make the same with the second term and so on. Finally, OR all the previous circuits together.

Hello... As I said all the Gates should be NAND or NOR gates only!
Thanks for replying, but seiously this is not all my circuit! My desired circuit is to fabricate this combination in CMOS using MicroWind2...

So still I will appreciate it if someone will come up and help me in that...
Thanks

 

When you encounter an OR , convert into a NAND gate with circles drawn at the input.

 

Can someone help me with making the ckt

With 2-NAND gates only?
Thanks... I need this ckt so I can start with the CMOS dsign

 

Try drawing the circuit as a start, then work from there.

You will find we are willing to help, to give hints or to show where you went wrong, but as a rule of thumb no one answers the questions outright, otherwise how will you learn?

Show me a logic schematic, and I'll show you how to start.

 

Thanks for the help man... This is where I reached and got stuck...

 

Ok Mr. Bill, Could you please check if am going right in the image I attached?

 

Hello Smoor - Oman,

Draw the circuit with noremal gates

Now adding two inverters to AND makes no difference right? .Now replace the AND and first inverter by NAND and represent the second NOT as you have done .

Whenever you encounter an OR gate ,add two inverters at the inputs of OR gate.
Remember one NOT added with OR gives you NAND and replace the another NOT by NAND

example:
say you want to represent x+y by NAND gate

add two inverters in x input and two inverters in y input before it is applied to OR.
Now by our replacement we have x' and y' as inputs for the NAND gate(second NOT added with OR)

so the output is (x' y')' = x'' + y'' = x + y (by demorgan's law) .This is what we wanted

 

OK, here is the Boolean equivalent.

And here are the tools you use to change it...

If you're wondering how I drew these check my blog out, especially my introduction.