Hi,
My apologies for the bad English.
I have a high voltage DC source (consider it 1000V dc max). It is continuously measured via PIC ADC. To bring it down, I use resistor voltage divider. (If an other method is better, kindly advise me.)
I've made the schematic bu some questions in my mind. (Please see attachment. Consider Fig.A and B ).

1. Divider network: Should I use 3 resistors (Fig1) or simply 2 resistors are enough (Fig2) by using a common GND for all?
2. Unity gain buffer: Is it recommended or I can cancel it and use directly input to ADC?
3. Resistor values: PIC datasheet recommends 10k impedance for ADC input. If I use/not use op-amp, what resistor values are suitable for divider network? I can tailor them to get required voltage. As I understand, resistor network with a little high impedance should work if I use op-amp.
4. Does 0.1uF capacitor is still needed if I use op-amp?
5. Zener: As op-amp is being operated on 12v supply, I use zener to protect ADC input. Is that OK?
. . . . . .
Thanks and best regards.

 

5. Zener: As op-amp is being operated on 12v supply, I use zener to protect ADC input. Is that OK?

Hi Mussawar,
Most PIC ADC are limited to a +5v input, so a 12Vzener would not protect the PIC
Is the 1KV electrical 'noisy'?

Circuit 'B' would be my choice
Also many resistors are limited to having a maximum voltage of 500V across them, so should use say 3 resistors in series.

E

 

Hi Mussawar,
Most PIC ADC are limited to a +5v input, so a 12Vzener would not protect the PIC
Is the 1KV electrical 'noisy'?

Circuit 'B' would be my choice
Also many resistors are limited to having a maximum voltage of 500V across them, so should use say 3 resistors in series.

E

Thanks for reply,
Zener is 5V.
Voltage source is DC Bus of a VFD. I don't know whether it is noisy or smooth during operation. I couldn't check it on oscilloscope.
Schematic is simplified. I have in my mind to use multiple resistors at high arm to avoid sparking.

 

hi,
Check this.
E

 

hi,
Check this.
E
View attachment 338920

My main concern about resistor values is the divider's output impedance. It should be able to precisely charge sampling capacitor. As per your diagrams, I think, if I use op-amp, values more than 1M is no problem. Am I right?

 

I needed to do the same thing.
I skipped the op amp and use ten 10 MΩ resistors in series followed by a suitable load resistor.
No protection required.

 

I needed to do the same thing.
I skipped the op amp and use ten 10 MΩ resistors in series followed by a suitable load resistor.
No protection required.

Thank for reply.
With 10MΩ at high side I need a 51kΩ combination to get 5V. Just one more question. According to datasheet and other internet stuff, ADC require 10kΩ or less source impedance. Are such high values capable to drive ADC? Some body suggested the use of 0.1uF capacitor to lower the source impedance.
And is it OK to use one common ground for source (1000V dc) and Micro-controller supply (5V dc)?

 

.....51kΩ combination to get 5V. Just one more question. According to datasheet and other internet stuff, ADC require 10kΩ

You can scale the resistors down to where the bottom resistor is close to 10k.

suggested the use of 0.1uF capacitor to lower the source impedance.

The capacitor will remove the high frequency noise. The time constant will be 10k & 0.1uF.

is it OK to use one common ground for source (1000V dc) and Micro-controller supply (5V dc)?

The micro supply should be floating. It's "ground" needs to be the ground of the 1000V supply and not earth ground. Many small supplies are not connected to earth ground.

 

Your 1000 VDC source and the MCU ADC must share a common ground Vss or ADC -Vref.

Using 51kΩ would not hurt. Try it and see the results. You may have to calibrate the system.
Adding a capacitor will reduce voltage variations (i.e. noise).

 

With 10MΩ at high side I need a 51kΩ combination to get 5V. Just one more question.
According to datasheet and other internet stuff, ADC require 10kΩ or less source impedance.
Are such high values capable to drive ADC? Some body suggested the use of 0.1uF capacitor to lower the source impedance.

Hi Mussawar,
I would recommend keeping the input sense resistor equal to 10K or less, as recommended in the datasheet.

When a sample is taken by the PIC, the PIC's internal ADC capacitor has to charge, which means it draws current from the source via the upper resistor of the divider chain, if the upper resistor is a very high value the current will be limited and so the internal capacitor will not fully charge in the ADC sample time and the reading will be low.

One way to correct this problem is to connect a capacitor across the lower resistor, this external charged capacitor supplies the current to the ADC's internal lower value capacitor.
If the 1000V source is fluctuating and the ADC sampling is set at a high rate, the external capacitors charged voltage will not be able to track the 1000V fluctuations, so the ADC values will be inaccurate.

I would recommend the circuit resistor values I posted, remember many types of resistors are limited to 250V or 500V applied voltage, so use a number of resistors in the upper part of the divider.

E

 

hi Mussawar,
This simulation shows the effect of the 100nF capacitor on the input of a PIC's ADC pin.
The left side image, no 100nF cap, so when the PIC reads the ADC voltage it is low.

The right side image, with 100nF shows the ADC internal capacitor fully charged, correct voltage.

E

The circuit is the internal circuitry of a typical PIC's ADC section.

 

TS has not stated the current capability of the HV supply.
Also, calculate the power dissipated by the voltage divider.

 

The impedance of a two resistor divider is always less than the lower resistance.

A capacitor does lower the impedance since it can supply virtually all current needed to charge the sampling capacitor as long as it is much larger than the sampling capacitor.

If you use a 10K 2M you will be using .5W from the supply.

I would go with the 10M and 51K and a capacitor at least 10X the sampling capacitor.

 

Your biggest problem is that the high voltage is not referenced to ground in a vfd. What you need to do is use a differential op amp circuit to derive the hv reference. An op amp, and 4 resistors is all that’s needed. But you series Up more resistors to meet the voltage rating of the resistors.

 

Your biggest problem is that the high voltage is not referenced to ground in a vfd. What you need to do is use a differential op amp circuit to derive the hv reference. An op amp, and 4 resistors is all that’s needed. But you series Up more resistors to meet the voltage rating of the resistors.

Perhaps I missed it, but where did the TS indicate that this has anything to do with a VFD?

 

Post number 3

 

Post number 3

Ah. Thanks.

 

TS has not stated the current capability of the HV supply.
Also, calculate the power dissipated by the voltage divider.

As I mentioned in a previous reply #3, HV source is a DC Bus of VFD. So it's capable of high current. Wattage can be calculate when resistor combination is finalized.
Thanks

 

hi Mussawar,
Can you post details of how the resistive divider is connected to the VFD, is there a common 0v/Gnd connection between the divider and VFD?

E

 

The impedance of a two resistor divider is always less than the lower resistance.

A capacitor does lower the impedance since it can supply virtually all current needed to charge the sampling capacitor as long as it is much larger than the sampling capacitor.

If you use a 10K 2M you will be using .5W from the supply.

I would go with the 10M and 51K and a capacitor at least 10X the sampling capacitor.

As per datasheet. sampling capacitor is 10PF. So 100PF should be enough to compensate high impedance and keep continue?Circuit is continuously reading ADC during operation.