NAND2 CMOS help

Thread Starter

geft

Joined Dec 8, 2011
19
The question asks to find the threshold voltage for the case where two inputs switch simultaneously. What does this mean?
 

Thread Starter

geft

Joined Dec 8, 2011
19
Consider a CMOS NAND2 gate for the case where the two inputs switch simultaneously.
Assume \(k_p = k_n = 100 uA/V^2\). Derive an expression for \(V_{th}\).

It then notes that when both transistors are switching simultaneously, NMOSA is in saturation and NMOSB is in linear region.

What does "two inputs switch simultaneously" mean?
 
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