When looking at the Vds limit on a MOSFET spec sheet, like the one here: https://assets.nexperia.com/documents/data-sheet/PSMN1R1-30PL.pdf, which of these two does the Vds limit imply:

• That the voltage of the power source applied to the circuit driven by the Drain-Source switch cannot exceed Vds(max), or
• That the voltage drop as figured by [ V = Rds(on) • Id ] cannot exceed Vds(max)?

In other words, does Vds(max) limit the voltage of the power source in an absolute sense, or dos it speak more to the relationship between Rds and other resistance (from other devices) on this circuit, in the context of power source voltage?

For reference, here's the maximums table from that sheet:

 

It means that the voltage across the drain-source terminals can never exceed that value under any operating conditions.
Typically that occurs when the MOSFET is in the OFF state.

 

So it's really both. I didn't know it was correct to speak of a voltage "being" across two points in a circuit when the circuit was switched off…

Just out of curiosity, say we have a MOSFET with a Vds(max) of 20v and a Ptot(max) of 400w. In series with Vds we also have a power supply and another device. We don't apply any voltage to Vds until after we've hit Vgs with a particular voltage, which lowers Rds. Let's say we want to drop 20 volts across Vds, and let's say we want to put the power dissipation at exactly the 400w limit. So do we need a Rds of 1 ohm? If we set it up this way, would it mean we can choose whatever voltage we want for our power supply, as long as the other device is capable of "eating up" the extra voltage? So for example, if the other device also had 1 ohm of resistance and could dissipate 400 watts, could we use a 40 volt power supply? If it had 2 ohms of resistance and could dissipate 800 watts, could we use a 60 volt power supply?

 

could we use a 60 volt power supply?

Not if the MOSFET ever gets turned off, which would apply the full 60V across the drain-source terminals, and likely zap the transistor.

 

I hear what you're saying: The Vds limit always applies, and any more than a 20-volts measured across Vds is always destruction town. So Vds(max) is the maximum voltage you can run to devices turned on by this MOSFET. It seems weird to me that you can apply a particular (60v) pressure across the device when it's on, but not when it's off. One of the mysteries of electricity I suppose.

I'm surprised that we can (a) speak of a Vds when the circuit isn't passing any energy, and (b) apply more than 20 volts if we have something else to "sink these extra volts into." I'm sure you can tell, but I'm trying to learn about electronics…

I guess one way of looking at (a) above is to imagine the transition between device ON and OFF. As the MOSFET's resistance gets higher and higher, Drain-Source consumes a larger and larger portion of the energy. This is because its resistance, climbing toward infinity, comes to outweigh that of the device and results in a larger share of the 60 volts being dropped in Drain-Source. But what's weird is that while the power dissipated by the MOSFET in the above example would also climb at first if we were to increase Rds the power eventually falls toward 0. Yet this is where we tax most fully our voltage limit.

For example, if we keep everything else the same and make Rds 2 ohms, we'll be sinking half of the 60 volts (so, 30), resulting in 450 w of power (up from 400) in the MOSFET. But if we push its resistance to 4 ohms, it's back down to 400 watts. At 8 ohms, it's down to 288. It's strange to me that the voltage has its own limit, even though the power dissipation declines.

So do we say the same thing about regular switches as well? For example, a light switch in a house. When it's off do we say that there are 110 volts across it, with a resistance of 'infinity' and a current of 0?

 

It seems weird to me that you can apply a particular (60v) pressure across the device when it's on, but not when it's off.

But you don't.
There's essentially no voltage across the device when it is on.
The 60V is appearing across the load resistance.

But what's weird is that while the power dissipated by the MOSFET in the above example would also climb at first if we were to increase Rds the power eventually falls toward 0.

Not really weird.
The maximum power theorem states that the maximum power dissipated in the transistor in series with a load resistor occurs when transistor resistance equals the load resistance (and thus the voltage across them are also equal).
On either side of that point, the power drops in the transistor.

Below is an LTspice simulation to illustrate this.
Note that the MOSFET dissipation (purple trace) is a bell shaped curve that peaks when its source voltage (red trace) is 1/2 the supply voltage and equals the resistor power (blue trace) at that point.
The resistor power keeps increasing, of course, until the MOSFET is fully on and V(out) is near zero.
At this point the resistor power dissipation is 4 times what the peak transistor power dissipation was. (A brownie point if you can tell us why. )

So do we say the same thing about regular switches as well? For example, a light switch in a house. When it's off do we say that there are 110 volts across it, with a resistance of 'infinity' and a current of 0?

Yes.

You need to clearly separate the effects of voltage, current, and power on transistors.

The transistor voltage limit is simply the maximum voltage that can be across the transistor terminals without causing breakdown failure of the internal semiconductor junction.
It's rather like insulation failure in a wire due to overvoltage.
It has nothing to do with power or current.

The transistor current limit is simply the maximum current the internal connections can tolerate without opening like a fuse.

The transistor power limit is determined by how well the transistor die can dissipate power (its thermal resistance) to it surroundings or a heat-sink, to keep its internal junction temperature below its maximum (typically about 175°C).
It is not directly related to the power dissipated in any load, which could be more or less than that.

 

I hear what you're saying: The Vds limit always applies, and any more than a 20-volts measured across Vds is always destruction town. So Vds(max) is the maximum voltage you can run to devices turned on by this MOSFET. It seems weird to me that you can apply a particular (60v) pressure across the device when it's on, but not when it's off. One of the mysteries of electricity I suppose.

While not near the expert that Crutschow is I am closer to the level that you are and was where you are not that many years ago, Trying to learn.

You seem to think that there is a direct electrical connection between the gate and drain. There isn't. It is in simple terms a capacitor, you charge up the gate(one plate of the capacitor) to cause the drain to source to conduct(the other plate of the cap).

Since your talking about a N type mosfet, the most normal way it is used is with the source tied to ground/common in the circuit. This means 0V. so the gate can then be at max(which should almost never be used) 20V to 0V. And at the same time the drain to source can be at (in your example) 60V to 0V. Since both gate and source are both connected to 0V both terms"Vgs" and "Vds" are true, but they aren't electrically connected.

Doing it this way means that you are using the N mosfet as a "low side switch".

 

While not near the expert that Crutschow is I am closer to the level that you are and was where you are not that many years ago, Trying to learn.

You seem to think that there is a direct electrical connection between the gate and drain. There isn't. It is in simple terms a capacitor, you charge up the gate(one plate of the capacitor) to cause the drain to source to conduct(the other plate of the cap).

Since your talking about a N type mosfet, the most normal way it is used is with the source tied to ground/common in the circuit. This means 0V. so the gate can then be at max(which should almost never be used) 20V to 0V. And at the same time the drain to source can be at (in your example) 60V to 0V. Since both gate and source are both connected to 0V both terms"Vgs" and "Vds" are true, but they aren't electrically connected.

Doing it this way means that you are using the N mosfet as a "low side switch".

I'm basically planning on using it as a relay, with the voltage at Gate responding to a "switch," and Drain conected to the power rail, then the source connected back to the negative terminal of the battery after passing through a device.

You guys have been most helpful. I appreciate it.

 

At this point the resistor power dissipation is 4 times what the peak transistor power dissipation was. (A brownie point if you can tell us why. )

I can use all the brownie points I can get…

When Rds is zero, the circuit resistance is halved as compared to when Rds were equal to the resistor's rating. Because current is inversely proportional to resistance, current on the circuit doubles in response to the resistance's halving. Then, because we are talking about a particular component, the resistance remains the same as before but we are squaring a now-doubled current in order to make our power calculation. This results in the current increasing by a factor of 4 in the "component" equation:

Before
P = I^2 • R

Now
P = (I • 2)^2 • R = (I^2 • 2^2) • R = 4 • I^2 • R

It seems important to keep in mind that current occurs in the context of the circuit, while resistance and voltage occur within the context of particular components (or portions of the circuit). For example, if by halving the resistance we were required to halve R in the above equation, we would only be doubling the power, which is what actually occurs when we look at the total circuit:

Ptot = (I • 2)^2 • Rtot / 2 = (I^2 • 2^2) • Rtot / 2 = 2 • I^2 • Rtot

 

I want to make sure I understand what's going on in the above graph and schematic.

The circuit goes from the V1/10V power source, through the resistor, through the Drain of the MOSFET, out the Source of the MOSFET (assuming saturation voltage is also applied at M1), down into the "pulse" (what is that?) and to ground. Correct?

 

he circuit goes from the V1/10V power source, through the resistor, through the Drain of the MOSFET, out the Source of the MOSFET (assuming saturation voltage is also applied at M1), down into the "pulse" (what is that?) and to ground. Correct?

Not quite.
The "pulse" is just the V2 input voltage to the gate [V(in), green trace], which is configured as a ramp that slowly turns the MOSFET full off to full on [I(R1), yellow trace].
Make sense?

 

Not quite.
The "pulse" is just the V2 input voltage to the gate [V(in), green trace], which is configured as a ramp that slowly turns the MOSFET full off to full on [I(R1), yellow trace].
Make sense?

Yes, except for how it's drawn. What is the little arrow next to the label M1 showing then? The body?

 

"The differences in the operation between a MOSFET and a bipolar junction transistor (BJT) are huge, but the main ones are that a BJT is a current controlled device because current at the base junction controls the flow of current between the collector and emitter junctions. However, a MOSFET is a voltage-controlled device, where a voltage at the gate junction creates an electric field, which controls the flow of current between the source and drain junctions."

Pretty cool!

https://www.petervis.com/electronics/MOSFET_Symbol/MOSFET_Symbol.html

 

What is the little arrow next to the label M1 showing then? The body?

Yes.
It shows the body diode internally connected to the source terminal.

 

Yes.
It shows the body diode internally connected to the source terminal.

OK.

Also, why is the purple trace labelled with the equation [V(Out) • Id(M1) + V(In) • Ig(M1)]? It looks like the power is being calculated by adding the voltage-current across both Drain-Source and Gate-Source… Is that how it's done?

 

OK.

Also, why is the purple trace labelled with the equation [V(Out) • Id(M1) + V(In) • Ig(M1)]? It looks like the power is being calculated by adding the voltage-current across both Drain-Source and Gate-Source… Is that how it's done?

In general, yes.
But since the gate current, Ig, is negligible in this case, all the power dissipated is from Id.

 

In general, yes.
But since the gate current, Ig, is negligible in this case, all the power dissipated is from Id.

Is it negligible because there's just zero resistance there?

 

Is it negligible because there's just zero resistance there?

No.
You seem to be thinking backwards.
If the gate were zero resistance there would be a high (infinite) current.
It's negligible because the MOSFET gate looks like a capacitor with a very high DC resistance and only nanoamp leakage.

 

No.
You seem to be thinking backwards.
If the gate were zero resistance there would be a high (infinite) current.
It's negligible because the MOSFET gate looks like a capacitor with a very high DC resistance and only nanoamp leakage.

I should have known that. Higher resistance means lower amps and lower power.…