Hi to all,
for an simulation (LTSpice) I would like make an inverter with pseudo NMOS technology.
The pull-up Mosfet is wired from Vcc to my "inverter" mosfet.
My question: it is possible to change the value of restistance of pull-up mosfet changing the W/L ratio? what is the relation between W/L ratio and restistance? It is possible and how can I set the restistance of pull-up mosfet in fine manner?
for an simulation (LTSpice) I would like make an inverter with pseudo NMOS technology.
The pull-up Mosfet is wired from Vcc to my "inverter" mosfet.
My question: it is possible to change the value of restistance of pull-up mosfet changing the W/L ratio? what is the relation between W/L ratio and restistance? It is possible and how can I set the restistance of pull-up mosfet in fine manner?