I am having a few issues trying to drive the gate to a mosfet controlling a fan in my project.

I have hooked the circuit up as so:

The part of the circuit that this thread concerns is the fan circuit powered by the isolated buck converter. |
additional capacitors are added to the output of the converter to bolster the supply of current to the fan (converter max output current is 833mA)

This circuit works, and controls the fan as expected however i get a few sporadic issues in operation.

I start the fan at a low duty and work up to ensure the caps do not drain fully as soon as the fan tries to spin.
Sometimes the fan fails to start properly and will jerk slightly every 2 seconds or so, sometimes it manages to spin up to speed after repeating this a few times.
I am monitoring the voltage of my supply capacitors and the voltage is above 11V while this occurs.

I checked the gate drive waveform and can see that it is far from ideal, the voltage at low duty is only 2V (i am using a logic level mosfet), which explains why it fails to start properly.

So now i have to ask the question, should i lower the value of the series gate resistance?
I am trying to isolate my microcontroller as best as possible and have also tried with a 4n25 optocoupler with a voltage divider supplying 6V though this also failed to start the fan reliably as the capacitor voltage dropped and the gate charge was very slow to drain which i imagine dissipated additional power and worked to drop the capacitor voltage somewhat.

This is the circuit i was using with the 4n25

What are my options as it stands?

If i can improve the gate drive of my FET then i reckon i will be able to soft start the fan with ease, however i am unsure how i can do this with the 4n25 and my limited supply of components.
I DO have some transistors laying around which i guess could be used for a totem pole configuration if anyone could recommend the resistor values and layout?

I apologize for the gad awful post with seemingly no clear cut question.
I am a little lost at the moment and though a fresh set of eyes might help the situation.

Thanks for reading (if you managed - you win a mystery prize)

 

try removing R3 and connect the Collector of the opto to 12v, if that doesn't work try the totem pole.

 

The first circuit is easier. You can just make the gate resistor smaller. If you want to know how long it will take to turn on a fet you can divide the spec Qg (total gate charge) by the current. This gives you time in ns. Yours has a Qg of 6.1 and you are driving it with .0005 amps (5volts/10K) or 12 usec. In reality it won't be this fast, but it gets you in the ballpark.
Make it 270 ohms and you can switch it in .3 usec.
The opto is a little harder. The 4N25 has a current transfer ratio of 20 to 50%. What this means is that if you drive the diode with 10 ma you can switch 2 to 5 ma with the transistor. Right now you are driving it with about 14 ma so you might expect 2.8 to 7 ma out. So you want to max out the micro at say 20 ma or 200 ohms lets say. Take out the top resistor as Dave suggested and change the bottom one to 1.2k.
Some fans have logic to run them that don't like PWM. What frequency? The opto is not fast.

 

thanks for the responses.

I dont think ill be able to use 12V as the fet i have has a maximum VGS voltage of 10V.

When i used the opto, the rise time was fast enough however the fall time was slow and more like an exponential decay. So if i increase the resisance that this charge drains through, i would expect to see this tail extend wouldn't i?

My switching speed is 31.25kHz.

Currently i have a lowered gate resistance to around 600 ohms and i get a good drive that allows me to start the fan at 10% duty.
This is fine as i can program a soft start into my code to ensure that even if the fan speed is set to 90% duty, the fan will start at 10% then increment to full speed.

So the drive is working better with the lowered series resistance as suggested, though i will try fiddle some more this morning (now that my head had recovered from the evening meltdown) and see if i can get the opto drive improved.

Is there any suggested configuration for a totem pole?
Sorry to be a lazy bastard.

Thanks for the help!

 

i have managed to identify the issue, but i am unsure why it is occuring.

I removed the additional capacitance across the dc-dc buck and it now works much better.

If i stick more than 330uf on the output of the converter, the voltage of both caps drops to zero much easier, however when i remove the additional caps and only use one - the voltage stays much higher.

I am not sure why, but it works!

Also, say i am using two 680 ohm resistors as in the image above, what is the gate current when the opto is ON?

the current through the divider is <10mA but when i short out the bottom resistor by turning on the opto, does this rise to 17mA?

 

Didn't see the 10 volt spec on the FET. Sorry.

I attached a simulation of your circuit. I think you will be able to see your problems with the 4N25.

 

Thanks for that!
The simulation has answered my questions. (and made me wonder why i didn't pull my finger out and do something similar myself in the first place)