Mod 13 counter

Thread Starter

200815712

Joined Mar 26, 2009
1
IM IN NEED OF AN ASYNCHRONOUS MODE-13 UP COUNTER LOGIC DIAGRAM TO CONSTRUCT(USING NEGATIVE EGDE TRIGGERED J-K FLIP FLOPS ),IC's(7476).PLZ HELP!!!!
 

beenthere

Joined Apr 20, 2004
15,819
Please do not hijack threads by posting new topics into them.

Make the counter with the J-K flip flops, but use an external AND gate to detect the count of 13. Look at the data sheet for a counter like the 161 to get a hint.
 

kiranag

Joined Apr 14, 2009
12
13 is 1101. First you place four JK flip flops side by side so that the leftmost flipflop will be your LSB(q0) and the rightmost be your MSB(q3). Give all flip flops inputs JK to Vcc. Give the main clock pulse which is to be counted to the clock input of LSB flip flop. Give the output q0 as the clock to second flip flop next to LSB and the output q1 as the clock to third flip flop and q2 as the clock to MSB flip flop. since 13 is 1101, take the output q3, q2 and q0 AND them and connect them to clear pin of all flip flops so that as soon as it counts 13, all the flip flops will be cleared to zero and the counter restarts. Here is the circuit. View attachment ckt.psdHope it has helped.
 

circuit101

Joined Apr 29, 2009
2
"..since 13 is 1101, take the output q3, q2 and q0 AND them and connect them to clear pin of all flip flops.."

Does this mean we take the output q3, q2, q0 and AND them

or.. do we also include q1? why do we leave q1 out?

or.. do you mean: leave q3 as the output and AND q2, q0 only?

:confused:
 
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