One caution, if the design is to be an original, is that exactly such a project was published in QST magazine a few years back. That scheme used the observation of the internal frequency counter results to generate a correction signal that would hold the controlled oscillator onto an exact frequency.
I do not recall the date of that specific issue, but certainly it was close to the project target functionality.

 

The two parts of your project are joined. For your control loop you need to chose between a phase locked loop and a frequency locked loop. The 1Hz pps signal from a GPS module is, as you suggest, the easiest time reference to obtain.
If you choose a frequency locked loop, the first part of your project requires a frequency measurement. For a PLL you just need to divide down from your 10MHz or whatever you chose to create a 1Hz signal to compare to the 1Hz signal from the GPS module.
For the frequency locked loop using a frequency measured by counting you will end up with some jitter as the control loop will hunt due to the quantization of the frequency measurement result.
The PLL approach is simpler in concept but the implementation of the loop filter needs some thought. The rule-of-thumb is the the loop bandwidth should be no more than 1/20 of the comparison frequency to avoid jitter. In this case the comparison frequency is 1Hz. This makes the loop capacitors large. The phase comparison can easily be done in standard logic, two flip-flops and an and gate, giving up and down tune pulses whose width is proportional to phase difference between the two 1Hz signals.
When looking for your oscillators you need to chose a VCXO or VCTCXO to allow tuning.

 

Certainly the PLL scheme for generating a frequency is simpler in theory. But there are some serious limitations, the primary limitation is that the generated frequency will be some multiple of the reference frequency feeding the phase comparator.
The frequency locked loop requires an accurate frequency counter and a way to compare the results with the intended frequency, and then make an adjustment to the oscillator frequency.

A third scheme is know as "direct Digital Synthesis", which requires a perfectly stable reference frequency and a whole lot of filtering, but it is stable and can be precise. But it requires a lot of fast electronics.