Hi All,

I am in need of generating a negative 5V supply rail. I am going to go for the LT1054: https://www.ti.com/lit/ds/symlink/l...05260&ref_url=https%3A%2F%2Fwww.google.com%2F. The data sheet recommends that the input capacitance be 10x smaller than the output capacitance, at least. I have chosen 4.7uF input and 100uF output capacitance.

However, I do not only use the +5V rail to generate this -5V rail. I also have other things connected to it. For example, a PQME1-S5-S15-M which is a 5V to 15V isolated DC/DC converter. It has 4.7uF x 2 and a 6.8uH inductor in a CLC pi-filter configuration.
My question is quite simple, should I expect that the capacitance of these other components to add to the 4.7uF input capacitance of the LT1054, and therefore cause issues? There are also a fair few 100nF bypass capacitors connected between the +5V rail to op-amps, etc. I am unsure whether this will be okay or whether it would be more prudent to reduce the input capacitance of the LT1054, but I would assume that because these other capacitances are not "local" to the chip, that they are less significant to the operation of the LT1054. Any inputs on this issue are appreciated..

Best regards,
SIC

 

The understandable confusion is that Cin is not the power input capacitor at Vin, and Cin is not identified on all the schematics.
It's the ratio of Cin (below) to Cout that's important.

 

The understandable confusion is that Cin is not the power input capacitor at Vin, and Cin is not identified on all the schematics.
It's the ratio of Cin (below) to Cout that's important.

View attachment 260988

Aha! Thank you so much for pointing that out. Super confusing indeed....

SIC