Hi every one,
I'm designing a simple oscilloscope. I need 48 MSPS ADC. For cost considerations, i prefer to use an ARM-Based micro controller with an internal ADC. Is there a ARM-Based micro controller with an internal 48 MSPS ADC?
Thanks

 

Typical 18 clocks / sample conversion, 12 bits, implies 864 Mhz clock.

Of course if 8 bits thern it scales lower, still pretty aggressive clock.


Regards, Dana.

 

Typical 18 clocks / sample conversion, 12 bits, implies 864 Mhz clock.

Of course if 8 bits thern it scales lower, still pretty aggressive clock.


Regards, Dana.

I don't know how you arrived at that conclusion. 18 x 12 x 4 = 864.
Are you assuming that the ADC has a serial interface or conversion mechanism?

 

Hi every one,
I'm designing a simple oscilloscope. I need 48 MSPS ADC. For cost considerations, i prefer to use an ARM-Based micro controller with an internal ADC. Is there a ARM-Based micro controller with an internal 48 MSPS ADC?
Thanks

The fastest internal ADC I have encountered is 12 bits @ 5Msps.

 

I don't know how you arrived at that conclusion. 18 x 12 x 4 = 864.
Are you assuming that the ADC has a serial interface or conversion mechanism?

SAR is typically N clocks + some clocks for sample acquisition and other
pre conversion needs. I know of one ARM family this is 18 clocks for
12 bit conversion.

The equation should have been 18 clocks/conversion x 48 MSPS = 864.


Regards, Dana.

 

Excuse me, I can't understand what are you saying. Can you offer a micro controller with a single channel 48 MSPS internal ADC?

 

Not that I know of. But you also need to indicate how many bits, 8, 10, 12 ?

In prior post trying to compute what the on chip clock frequency has to be for the SAR.
If you want X SPS, you look up how many clock cycles required to do 1 SPS, and multiply
that X SPS to get onchip clock frequency. The SAR I am thinking of does 1 SPS in 18 clocks.
So 18 clocks/sample x 48M samples/sec = 864 M clocks/sec = 864Mhz on chip. This particular
chip is good for 1 MSPS.


Regards, Dana.

 

I need 8Bit adc.
But what is your calculations shows is only about processors clk, what about processors internal ADC? It should support 48 MSPS.

 

The stm32f303 has 4 adc with clock of 72 mhz. The problem is the system used is "successive approximation" , that is a sample is taken at 2 clock pulses and then 8 more clock pulses are needed to calculate the value of the pulse. This means the maximum frequency read is 7.2 mhz at 72 mhz clock.
If you interleave 2 adc you can double this to 14.4 mhz
Interleavening is sample value and start calculation,half way to finish calculation start a sample on second adc.
In theory you could interleave 4 adc to get 24 mhz.
The fastest I have heard of any processor is 20 mhz

 

This might help -

https://www.analog.com/media/en/training-seminars/tutorials/MT-021.pdf


Regards, Dana.