Hi,
I have a system that uses 256 x 1 DRAM (12 of them to give 12 bits)
The system supports up to 1M total with 4 x ROW ADDRESS STROBES, 1 strobe for each 256K x 12 bank
and I want to try and build a memory expansion board using 256 x 4 DRAM to save on chip count.
The 256 x 4 has an OUTPUT ENABLE that the 256 x 1 doesn't.
How would I generate this, using an inverter on the WRITE ENABLE so that when WRITE ENABLE is 1 OUTPUT ENABLE is 0 and vice versa?
Any tips on using 4 bit DRAM instead of 1 bit?
I could also try to use larger 1 Bit DRAM like 1M x 1?
(I would only be using 768K of the whole 1M)
How would I use the extra ROW ACCESS STROBES to control the extra address lines if this is how I would do it?
No I don't really know what I'm doing. I'm stubborn like that
Any help is better than none.
Thanks
I have a system that uses 256 x 1 DRAM (12 of them to give 12 bits)
The system supports up to 1M total with 4 x ROW ADDRESS STROBES, 1 strobe for each 256K x 12 bank
and I want to try and build a memory expansion board using 256 x 4 DRAM to save on chip count.
The 256 x 4 has an OUTPUT ENABLE that the 256 x 1 doesn't.
How would I generate this, using an inverter on the WRITE ENABLE so that when WRITE ENABLE is 1 OUTPUT ENABLE is 0 and vice versa?
Any tips on using 4 bit DRAM instead of 1 bit?
I could also try to use larger 1 Bit DRAM like 1M x 1?
(I would only be using 768K of the whole 1M)
How would I use the extra ROW ACCESS STROBES to control the extra address lines if this is how I would do it?
No I don't really know what I'm doing. I'm stubborn like that
Any help is better than none.
Thanks