I am stuck at this problem. I already search the forum and I found a similar question but it is not exactly the same.
Here is my homework question:
Design a circuit to implement an 8-1 mux using two 4-1 muxes and an or gate. Also write the truth table.
This is the truth table:
A B C F
0 0 0 A0
0 0 1 A1
0 1 0 A2
0 1 1 A3
1 0 0 A4
1 0 1 A5
1 1 0 A6
1 1 1 A7
This is what I know so far about connections:
I have to connect the A selection line to the A selection line of the muxes. In other words, the first selection line of the first mux will select the first selection line of the second mux. The other selection line of the second mux will be C and the second selection line of the first mux will be B. I just OR the output of the two muxes. I am not sure if is right....
Here is my homework question:
Design a circuit to implement an 8-1 mux using two 4-1 muxes and an or gate. Also write the truth table.
This is the truth table:
A B C F
0 0 0 A0
0 0 1 A1
0 1 0 A2
0 1 1 A3
1 0 0 A4
1 0 1 A5
1 1 0 A6
1 1 1 A7
This is what I know so far about connections:
I have to connect the A selection line to the A selection line of the muxes. In other words, the first selection line of the first mux will select the first selection line of the second mux. The other selection line of the second mux will be C and the second selection line of the first mux will be B. I just OR the output of the two muxes. I am not sure if is right....