LTSpice Voltage Measurement

Thread Starter

RRRRSSSS

Joined Jun 16, 2023
128
hi

I have attached a 2 stage ce amplifier spice sim. The voltage on the collector of Q2 is 7.3 vdc
when the cursor is on V(n001). However, the .meas in the error log displays a value of 8.0 vdc.
The collector of Q1 shows 7.3 vdc on the schematic and in the error log.

Why would this be?

thx

RS
 

crutschow

Joined Mar 14, 2008
34,682
Why would this be?
The .meas MAX is the peak value, not the average (DC) value.

It would be a lot easier to follow the node voltages if you labeled the ones you want to measure (i.e. Q1c), such as you did for Vin.
Also, if you make a circuit change, all the program generated node designations can change.
 

ericgibbs

Joined Jan 29, 2010
18,992
Hi RRSS,
To get LTS to print the quiescent voltage of a Node,
Place the Cursor on the node.
Right Click
Select 'Place OP data label'

E
 

ericgibbs

Joined Jan 29, 2010
18,992
hi RRSS,
The irc2 is the Maximum current through Rout, 690uA is the actual signal component current.
E
EG57_ 950.pngEG57_ 951.png
 
Last edited:

Thread Starter

RRRRSSSS

Joined Jun 16, 2023
128
Got it. irc2 is the total current. So 13.37 total mA - 0.69 ac mA = 12.68 dc mA

thanks E

RS
Again, thanks all for your help!

I have another question:

Stage 1 Load = RC1║Rin(total)2 = 765Ω
Av(Stage 1) = Stage1 Load /(r'e1 + RE11) = 765/(1.95 + 27) = 26.42

Stage 2 Load = RC2 = 1KΩ
Av(Stage 2) = RC2 / (r'e2 + RE21) = 1K/(1.95 + 27) = 34.53

Vs = 1 mV
Vin = Vs(attenuated) = 985μV
Vout = 985μV * 26.42 * 34.53 985μV = 899 mV

The sim results in a Vout = 690mV. Since the stages are identical that makes
sense that 985μV * 26.42 * 26.42 ≈ 690mV . However, the loads for stages 1
and 2 are different and therfore the gains must be different everything else
being the same.

Can someone please clarify this situation?

Thx
 

Thread Starter

RRRRSSSS

Joined Jun 16, 2023
128
hi RRSS,
Hope you can follow all this information, ask if a doubt.
For each Stage it shows >>
AC Analysis, Input impedance & Output impedance.

Note: your Sine Source is 1kHz

E
View attachment 297844View attachment 297845View attachment 297846
Thanks again E.

Sorry to keep bugging you but I have more questions.

1. What is the dashed line and how do I make it disappear?
2. The input impedance of both stages is approx. 3.19KΩ?
3. The output of both stages is approx. 34Ω?
4. The gain of each stage is approx. 33? That would mean 985 μV * 33 * 33 = 1.07 Volts out
but the sim says 690mV.
 

ericgibbs

Joined Jan 29, 2010
18,992
hi RRSS,
Stage gain is shown dB. approx 30dB.
E

Updated:
This shows the Voltage Gain using the same 1mV input signal, note the gain at 1kHz is only 695.

E
EG57_ 961.png
 
Last edited:

Thread Starter

RRRRSSSS

Joined Jun 16, 2023
128
hi RRSS,
Stage gain is shown dB. approx 30dB.
E

Updated:
This shows the Voltage Gain using the same 1mV input signal, note the gain at 1kHz is only 695.

E
View attachment 297853
Thanks E this is a big help. I am just surprised at the value of the output impedance.

Based on my reading, I thought that the output impedance of stage 1 was equal
to the load on stage 1. Which I calculated to be

Stage 1 Load = RC1║Rin(total2) = 765Ω

and that the output impedance of stage 2 was

the load on stage 2 which I thought was Stage 2 Load = RC2 = 1KΩ.

Perhaps I am confusing output impedance versus load?

RS
 
Last edited:

ericgibbs

Joined Jan 29, 2010
18,992
hi RRSS,
The LTSpice method is the Zout of the transistor Collector, if you want the actual circuit output impedance you have to use the standard equations which include the value of the collector resistor.
E
 
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