LTspice CD4001 model; weird behaviour

Thread Starter

Alec_t

Joined Sep 17, 2013
14,335
A word of warning.
Using the CD4000_v library with a circuit node labelled "vdd", all models should allow the external vdd voltage to over-ride their internal vdd parameter which, by default, is 5V. But for the CD4001 (a 2-input NOR), simulation behaviour depends on which of two NOR symbols is used in the schematic.
With the square box international symbol all is well and good .......
4001good.png
Here, the gate output voltage swings between 0V and 12V as it should, even though the vdd parameter in the model is the default 5V.
However, if the curved symbol is used, or merely present in the schematic, the output of the gate swings between 0V and 5V only ......
4001bad.png
I haven't looked into the cause, but there seems to be a bug associated with that curved symbol. Any thoughts?

Update:
Problem sorted by editing the curved symbol to delete its Modelfile attribute.
 
Last edited:

Papabravo

Joined Feb 24, 2006
21,228
Open the two symbols in the symbol editor and see where the ModelFile parameter points.

ETA: It works for me
1684251186235.png

Note you may not need the .lib cd4000_v.lib statement if the symbol contains the ModelFile attribute and it points to that library. Both symbols appear to have picked up the correct value of Vdd. Here is the spice netlist file for this simulation.


Code:
* C:\Users\%HOMEPATH%\Documents\LTspiceXVII\examples\Temp\C\CD4001_TestJig.asc
XU1 Tin Tin U1O VDD 0 CD4001B VDD=5 SPEED=1.0 TRIPDT=5e-9
XU2 Tin Tin U2O VDD 0 CD4001B VDD=5 SPEED=1.0 TRIPDT=5e-9
V1 Tin 0 PULSE(0 12 0 {TT} {TT} 0 {TP})
V2 Vdd 0 12V
.param TT=1m
.param TP=2*TT
* Triangle Wave
.tran 10m
.lib CD4000_V.lib
.backanno
.end
Look at your spice netlist and see if they point to the same or different subcircuits. As you can see in my installation, they point to the exact same subcircuit.

Here is the header from the CD4000_v.lib on my system
Code:
*  CD40xxx Model libraray for LTSPICE from www.linear.com/software
*
*  Revision 0.65 10/04/2013     CD40_IN_0: V=LIMIT(0,V(in) -> V=LIMIT(0,V(in,VGND)

*  Revision 0.64 09/13/2013     force Q=high if R AND S are high
*  Revision 0.63 01/30/2012     enabled B(VDD) in input/output driver models
*  Revision 0.62 07/31/2007     CD4510B, CD4516B, CD4029 added
*  Revision 0.61 09/24/2005     CD4538B added, CD14538B reset removed from trigger
*  Revision 0.60 04/14/2005     CD4020B, CD4024B, CD4040B clock corrected  
*  Revision 0.59 04/14/2005     CD4020B, CD4024B, CD4040B clock inverted  
*  Revision 0.58 03/29/2005     CD4017B inverted output Q59
*  Revision 0.57 05/03/2004     CD4008B added
*  Revision 0.56 08/29/2003

And here is the subcircuit from my installation

Code:
*
* 2-input NOR gate
* tpd 125n
* tr 100n
.SUBCKT CD4001B  A B Y  VDD VGND  vdd1={vdd} speed1={speed} tripdt1={tripdt}
.param td1=1e-9*(125-40-10)*5/{vdd1}*{speed1}
*
XIN1  A Ai  VDD VGND  CD40_IN_1  vdd2={vdd1}  speed2={speed1}  tripdt2={tripdt1}
XIN2  B Bi  VDD VGND  CD40_IN_1  vdd2={vdd1}  speed2={speed1}  tripdt2={tripdt1}
*
A1  Ai Bi 0 0 0  Yi 0 0  OR  tripdt={tripdt1}  td={td1}
*
XOUT  Yi Y  VDD VGND  CD40_OUT_1X  vdd2={vdd1} speed2={speed1}  tripdt2={tripdt1}
.ends
 
Last edited:

Thread Starter

Alec_t

Joined Sep 17, 2013
14,335
Thanks for the suggestion. Removing the ModelFile attribute sorted it. I've edited post #1 accordingly.
So it looks as though that ModelFile pointer over-rides the .lib command.
 

Papabravo

Joined Feb 24, 2006
21,228
Thanks for the suggestion. Removing the ModelFile attribute sorted it. I've edited post #1 accordingly.
So it looks as though that ModelFile pointer over-rides the .lib command.
That may be the wrong approach if there is any chance those symbols or the CD4000_v.lib file are ever updated. All of the other symbols have the ModelFile Attribute and that kind of guarantees the correct library is chosen. This is not a trivial matter.

Second, if you look closely at your netlist file you may see the identical statement repeated twice. Once for the contents of the ModelFile attribute and once for the .lib statement. It doesn't hurt if both references are to the same file. Not sure what happens if the files have the same sub circuit names with different contents.

I think the is a search precedence that includes:
  1. On the schematic
  2. In the same folder as the schematic
  3. In the sub folder in the standard location
  4. In the folders specified for searching in the LTspice Control Panel
 

Thread Starter

Alec_t

Joined Sep 17, 2013
14,335
That may be the wrong approach if there is any chance those symbols or the CD4000_v.lib file are ever updated.
True, but in this case the rogue pointer was to CD4000.lib, whereas all the other models in the CD400_v.lib library had no pointer.
 

Papabravo

Joined Feb 24, 2006
21,228
True, but in this case the rogue pointer was to CD4000.lib, whereas all the other models in the CD400_v.lib library had no pointer.
That's funny because ALL of the symbols in my CD4000_v.lib file have that filename in the ModelFile Attribute. I wonder why they are different.
 

Thread Starter

Alec_t

Joined Sep 17, 2013
14,335
My bad. I meant all in theCD400.lib library. CD4001 was the rogue one in the CD4000_v.lib library.
 
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