IF that's the case TS might try connecting the start switch across the FET.Yes...but there is a race condition between trigger and power-up. The trigger happens too fast.
SG
IF that's the case TS might try connecting the start switch across the FET.Yes...but there is a race condition between trigger and power-up. The trigger happens too fast.
Datasheet say that it powers up not triggered. The RC network on the trigger pin is meant to delay trigger by 100ms to enable stable power up. It is triggering so doing what I need in that respect. What's the implication with "too fast"?Yes...but there is a race condition between trigger and power-up. The trigger happens too fast.
Reverse connections on RC. Capacitor from pin6 to ground.The RC network on the trigger pin is meant to delay trigger by 100ms to enable stable power up
0.02VWill do. FYI when low the output happily drives >11mA into an LED connected to supply.
That's good below .1 volt0.02V
I'm seriously thinking of ditching the FET and using an opto-coupler to control the power. The Output can clearly drive it.That's good below .1 volt
SG
I was getting to that myself. Did you reverse the RC network?I'm seriously thinking of ditching the FET and using an opto-coupler to control the power.
Not yet. I was worried I might be not able to get the timer started but it is starting so I'm not to concerned about that bit!I was getting to that myself. Did you reverse the RC network?
SG
Isolates the SET switch so only the chip activates the load.What is the diode doing?
Built your circuit using a Vishay TO14642 opto which has very similar characteristics to the CPC1008N (but lower Ron).Isolates the SET switch so only the chip activates the load.
SG
I think you meant the VO14642.Built your circuit using a Vishay TO14642
Yes, I did mean VO14642.I think you meant the VO14642. Any case the wiring should be as below.
SG.
Try pin 4 and 6 to supply and 5 to circuit.config with pin 6 to supply and pin 4 to circuit.
OK I think the problem is in the ICM7242. When no power is applied there is some residual resistance on the output pin which is causing the opto to stay on. Seen this before in other chips. Give me a few minutes and I'll come up with something.I usually use these with GND to pin 5 so seems logical that in high side use pins 4 and 6 would be the more +ve.