I think you're on to something there. I suspect that is exactly what I did on the 6809 project. A section of the DRAM was dedicated to graphics and was automatically refreshed by the DMA controller.The trick that the Apple][ did was to map the graphics into the DRAM so that the normal accessing of the graphics data kept the memory refreshed. The 6502 accessed that RAM during one phase of the 2-phase clock and the graphics accessed the RAM during the other phase.



