I see the truth tables for both NAND and AND on wikipedia. I'm not sure what I'm missing?

 

I see the truth tables for both NAND and AND on wikipedia. I'm not sure what I'm missing?

Make a truth table for YOUR circuit. It will help you figure out what logic operation it's doing.

 

Hold it, based on what I see on Wikipedia, the 1,1 when it goes through the AND gate is then 1,1 but then it goes through the NOT gate again which makes the answer 0,0. Did I finally get it! I'm starting to kinda get it.

When you say '1,1' the first time you appear to be talking about the two inputs to the AND gate resulting from having '0,0' being the two inputs to the two inverters, respectively. Hence there will only be a single output from the AND gate (it takes two inputs and produces a single output). I think you are getting yourself confused because you won't take it step by step.

Walk the table through. You've been struggling with it long enough that I will go ahead and work out the original problem as an example of the way we are suggesting you work out this one because, clearly, you have been putting in the effort that we always want to see.

Attached is your original problem after cleaning it up and labeling all of the nodes. The truth table then starts out like this:

A|B||C|D|E||Y
0|0||||||
0|1||||||
1|0||||||
1|1||||||

The important this is that there be one line for every possible combination of the input signals.

With A and B known in each row, we have the information we need to find both C and D.

C = A OR B, so it is a 1 as long as either A or B is a 1:

A|B||C|D|E||Y
0|0||0||||
0|1||1||||
1|0||1||||
1|1||1||||

D = A AND B, so it is a 1 only if both A and B are 1:

A|B||C|D|E||Y
0|0||0|0|||
0|1||1|0|||
1|0||1|0|||
1|1||1|1|||

Now that we know D, we can find E.

E = NOT D (or D') and is therefore just the opposite of whatever D is.

A|B||C|D|E||Y
0|0||0|0|1||
0|1||1|0|1||
1|0||1|0|1||
1|1||1|1|0||

Finally, since we now have C and E, we can find Y.

Y = C AND E, so Y is 1 only if both C and E are 1.

A|B||C|D|E||Y
0|0||0|0|1||0
0|1||1|0|1||1
1|0||1|0|1||1
1|1||1|1|0||0

To make the final result clearer, we can eliminate the columns for the interior nodes:

A|B||Y
0|0||0
0|1||1
1|0||1
1|1||0

You should recognize this as the truth table for an XOR gate.

 

I'm not following, again I'm just barely starting to understand this finally. If the output as we figured out is 0,0 right, what is the next step?

 

I'm not following, again I'm just barely starting to understand this finally. If the output as we figured out is 0,0 right, what is the next step?

PF, I want to see you draw a truth table for your circuit by yourself. I honestly think it will help.

WBahn, I was trying to get him to do the work himself, rather than just give him the answers. No offense, but I'm actually glad he didn't follow your post

Back to PF: Draw the truth table and upload an image here please. We'll take it one step at a time.

Oh, and the output of the circuit for (A=0 B=0) and (A=0 B=1) is not 0,0. You seem to be thinking that 0,0 is a single answer for one of the conditions ( (A=0 B=0), for example). That's not it. Each character corresponds with one of the conditions. The first character (before the comma) means the answer when A=0 and B=0. The second character (after the comma) is the result of A=0 and B=1.

 

XOR is not an option, NOR is though? I was feeling good about where I was, now I'm confused again.

 

What exactly is confusing you?

 

PF, I want to see you draw a truth table for your circuit by yourself. I honestly think it will help.

WBahn, I was trying to get him to do the work himself, rather than just give him the answers. No offense, but I'm actually glad he didn't follow your post

As stated in my post, I worked the ORIGINAL problem from the first post in this thread. I did NOT work the current problem he is working on -- just look at the attached image.

 

PF, I want to see you draw a truth table for your circuit by yourself. I honestly think it will help.

WBahn, I was trying to get him to do the work himself, rather than just give him the answers. No offense, but I'm actually glad he didn't follow your post

Back to PF: Draw the truth table and upload an image here please. We'll take it one step at a time.

Oh, and the output of the circuit for (A=0 B=0) and (A=0 B=1) is not 0,0. You seem to be thinking that 0,0 is a single answer for one of the conditions ( (A=0 B=0), for example). That's not it. Each character corresponds with one of the conditions. The first character (before the comma) means the answer when A=0 and B=0. The second character (after the comma) is the result of A=0 and B=1.

Right i just caught that, I reread the question and I missed the second half. Its 0,1.

 

As stated in my post, I worked the ORIGINAL problem from the first post in this thread. I did NOT work the current problem he is working on -- just look at the attached image.

Oh I'm sorry. You mean the circuit in post 3? I was thinking you were talking about the one in post 9. I apologize for that....

 

Everything else is confusing me. The "what type of logic is the result part".

 

Right i just caught that, I reread the question and I missed the second half. Its 0,1.

Ah, much better!

Ok, so now that you've figured that out, you're trying to find the equivalent logic, right?

Now for that same circuit the type of logic created is NAND right?

I assumed that's what you meant by that statement.

Truth tables are very simple once you understand how to set them up. For two inputs, you have four input conditions, binary equivalent of 0 to 3. 00, 01, 10, and 11. These all go down the left side, each bit representing the state of an input (0 is low, 1 is high):

A B X
0 0
0 1
1 0
1 1

Then, go through one by one. Find the output (X) for when A and B are 0, and write that under the x, right next to the input conditions.
Next, find the output (X) for when A=0, B=1. Write the answer in the X column, in the same row as with 0 1. Repeat this, and that's your truth table. It will help you figure out what logic your circuit is actually doing.

 

Yeah, post 3 (the one he was talking about in post 1, but didn't post the actual circuit until a bit later).

No problem. We are on the same page with regards to guiding him to the answer on his own.

@pf
I'm glad you got it. Now, what is the name for the logic function that this circuit implements? Hint: it implements one of the basic logic functions, just like the first one implemented the XOR function).

 

Yeah, post 3 (the one he was talking about in post 1, but didn't post the actual circuit until a bit later).

No problem. We are on the same page with regards to guiding him to the answer on his own.

@pf
I'm glad you got it. Now, what is the name for the logic function that this circuit implements? Hint: it implements one of the basic logic functions, just like the first one implemented the XOR function).

Yeah I got ahead of myself. So I think we are pointing towards this overall being an NOR/NOT OR logic?

 

Yeah I got ahead of myself. So I think we are pointing towards this overall being an NOR/NOT OR logic?

PF, they are asking for the equivalent logic operation. It's not asking what operations make up this circuit. It will be ONE answer. If you make the truth table, like I described before, and compare it to known truth tables, it'll help you figure out which operation is equivalent to your circuit.

 

OK, explain to me how to me how I'm created a truth table out of this? Based on my own logic here, and process of elimination its got to be an AND operation, no? Still explain to me how do I create a truth table here?

 

Yeah I got ahead of myself. So I think we are pointing towards this overall being an NOR/NOT OR logic?

PF, what is it that you have against making the truth table as we have been constantly trying to get you to do? Draw the damn table! Do the best that you can and post it and then we can see, exactly, where you are having difficulty. It's fine to try to talk through the problem verbally at first, but if that doesn't pan out quickly, you need to step back and work the problem explicitly, step by step.

 

OK, explain to me how to me how I'm created a truth table out of this? Based on my own logic here, and process of elimination its got to be an AND operation, no? Still explain to me how do I create a truth table here?

PF! I walked through creating the truth table for the original problem step by step! All you have to do is do what I did, only do it for the circuit you are working on now.

 

I'm just not getting it. Nothing is making sense to me now. I am glad I got the first half of the question though, that was a major break through for me. I'm kinda like a pilot now that has spacial disorientation, I don't know what is up or down at this point. I can't find the horizon. It does amaze me at this point you can just look at these circuits and figure out what is going on, that is a VERY cool thing to be able to do.

 

I'm just not getting it. Nothing is making sense to me now.

So take it step by step!

Draw a truth table like my first one that only has the colums for the inputs filled in plus a blank column for each interior node in the circuit and a column for the output. Post that. PLEASE! Who knows, perhaps that is where you are getting sidetracked. We can't tell if you won't show!