.model MPF102 NJF(Beta=1.04m Betatce=-.5 Rd=1 Rs=1 Lambda=2m Vto=-3.41 Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7 Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=11.73E-18 Af=1)
Since the bias resistor goes to ground, the bias voltage is not affected by the lack of a capacitor.With the signal DC coupled, you have defeated the bias in the gate. Put a capacitor between the signal and the gate.
Already use that library and I had compared my .jft library with the one just downloaded from the site to understand eventual difference and the file .model is the same in both library. Furthermore, i've recalculated R1 and R2 respectively 2k5 and 600ohm (eventually divided in two resistors like described above). This for 12Volt supply. Third and fourth stage haves the The third and fourth stage still has the same problem that I can partially compensate for this distortion but not completely. Considering that I have a 12 volt supply I would have expected less different behavior on this fet.I think you might have a problem.
I see the phase shift from the amplifer and a further phase shift from the filter but the waveforms look OK which is confirmed by the FFT results.
Green is the input voltage
Blue is the amplifier output with a 100K load in parallel with the filter
Red is the output of the filter which looks pretty clean
I've included the model statement from Bordodynov's library which you can find at
http://Bordodynov.ltwiki.org
Download the 16 M file and merge it with the installed libraries in your Documents folder if you want to try it.
View attachment 242765
Yes.Can obtain any improvement to supply from to dual supply (like +12 and -12) substituting the GND to negative supply?
Yes, reducing the input signal, the wave become normal. I'm try to lower the gain in the last stage.Try it with much lower level input signal.
Could I put a calculated ground resistor to lower the input signal?Yes.
Reducing the peak signal voltages with respect to the supply voltages will tend to reduce the distortion (for example there looks to be some compression distortion at the bottom of you original waveform).
You will, of course, need to AC (capacitor) couple the input to keep the proper transistor bias.
by Aaron Carman
by Aaron Carman
by Robert Keim
by Duane Benson