I've been working on an acoustic guitar preamp for some time now, here is one previous thread. The front end is similar to a Fishman Mini (attached). I have measured THD+N using REW and a Motu M4 on various prototypes, both thru hole versions use same JFET BJT arrangement as Fishman mini. SMD version(s) attempted to make it more compact and eliminate hookup wires since they can be a source of noise pickups for a JFET front end. But the THD+N is going up, not down.

1. Original thru hole (Blue), PN4392 and 5088s - 0.058% THD+N
2. Next thru hole (Red), PN4392 and 5088s - 0.042%
3. SMD v1.0, J113 and SS8050 - 0.028%
4. SMD v1.1, MMBF4392 and BC847C - 0.063% (all 4 measured at same level)

The above measurements are the entire pedal, but for the SMD versions I can measure just the JFET and Buffer portion, same as schematics below:

1. v1.0 power board only - 0.0096% THD+N
2. V1.1 power board only - 0.059% THD+N

Even though v1.0 is the best, it is clear to me that for v1.0 and v1.1 I didn't know what I was doing with biasing the JFET for lowest noise. I have LTspice and have various simulations, but I am a novice and don't understand how to do noise measurement analysis . So I'm looking for an education on how to properly bias and design a JFET audio front end so it produces the lowest THD+N. I'd love to get THD+N down to 0.01%. Other circuit suggestions are welcome too, but I suspect the JFET is the main thing. The circuit below is roughly 1/2 of the total circuit, the other 1/2 has lots of RC filtering, EQ, etc, recent pictures of v1.0 here.

Vcc, Vee are +-15v using TEC 2-0923 DC-DC converter from 9v.

 

In theory, the higher the Gfs the greater the feedback, the closer the gain is to unity, and the lower the distortion.
Have you tried it with a simple resistive load to 0V or to V- just to make sure that the bipolar current sink isn’t causing the problem?
If low THD is your object, then a JFET op-amp will beat a discrete JFET circuit every time. As you have other op-amps in circuit, do you have a particular reason for using the discrete buffer?
I’ve used one before, but only because I needed one extra section on my TL074

 

I wondered about a jfet op amp, using an OPA1652. I tried to model it's THD+N in spice and compare with the discrete jfet, but I'm not succeeding. I had AI help me with the LTspice code, but I think it was chasing it's tail, never got it to work right. Seems that there should be a simpler way to measure distortion or noise or both.



Similarly the transistor circuit.


Back to the transistor, I've read you get lowest distortion when the transfer curve is linear. I think part of the problem is that Vds is pretty high, almost 14v. The below curve suggests I need to lower Vds and get Id in the 1-5 mA range. Currently it's 1.3 mA above with the 100R.


Thanks for the help!

 

Have you experimented with 2SK3557?

 

Have you experimented with 2SK3557?

I was looking at LSK170 but then realized how expensive they are. I’ll look at the 2sk3557. Why do you suggest that one?

 

Back to the transistor, I've read you get lowest distortion when the transfer curve is linear. I think part of the problem is that Vds is pretty high, almost 14v. The below curve suggests I need to lower Vds and get Id in the 1-5 mA range. Currently it's 1.3 mA above with the 100R.

Thanks for the help!

You are misinterpreting the meaning of linear. It is not where the curve is flattest.
It is where ΔID/ΔVGS is constant.



Try ID = 5 mA @ VDS = 0.8 V, VGS = -0.6 V
or ID = 5.5 mA @ VDS = 1.2 V, VGS = -0.6 V

 

I was looking at LSK170 but then realized how expensive they are. I’ll look at the 2sk3557. Why do you suggest that one?

Reasonably price and super high Gfs.

 

Have you read Merlin Blencowe’s books? I know they are about valves not JFETs, but what you are designing is no different from a cathode follower.