JFet- Distorted sine wave at the output. Why?

Thread Starter

DaniKowa

Joined Sep 23, 2020
218
Hi, why in this diagram the sine wave is distorted at the output? Since I have some MPF102s available, is there a way to solve without changing components? Many thanks.
 

Attachments

Papabravo

Joined Feb 24, 2006
21,159
I'd like to help you out but there are two problems:
  1. I don't have a model for the MPF102 JFET.
  2. Why would you expect an undistorted output?
EDIT: Found the model and I'm not seeing any extreme distortion. The FFT shows that it has harmonic content - is that your complaint?
It looks like your amplifier is enhancing the 3rd harmonic that is present in the input. You can eliminate some of this harmonic distortion with a low pass filter. Maybe a 3rd order BW with a corner at 12 MHz.


1625489393515.png
 
Last edited:

Audioguru again

Joined Oct 21, 2019
6,674
Of course the output is distorted, the very simple circuit has a fairly high output level but it has NO negative feedback.
An ordinary bipolar transistor also produces extreme distortion without negative feedback. But two transistors in a preamp circuit have lots of negative feedback then the distortion is very low.
 

crutschow

Joined Mar 14, 2008
34,285
You can add some negative feedback to reduce the distortion at the expense of some loss in gain.
One way is to split the source resistor R2 into two series resistors and only bypass the bottom resistor with C1.
 

Thread Starter

DaniKowa

Joined Sep 23, 2020
218
Hi and thanks for the help! The wave generated from my LtSpice is below:

synus.JPG

and i see it visibly distorted . Is the same for you? I ask this to know and understand eventually difference in the spice file that giustify eventual difference in the wave . The model i've used for MPF102 is:
.model MPF102 NJF(Beta=1.04m Betatce=-.5 Rd=1 Rs=1 Lambda=2m Vto=-3.41 Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7 Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=11.73E-18 Af=1)
 

BobTPH

Joined Jun 5, 2013
8,813
With the signal DC coupled, you have defeated the bias in the gate. Put a capacitor between the signal and the gate.

Bob
 

Papabravo

Joined Feb 24, 2006
21,159
I think you might have a problem.
I see the phase shift from the amplifer and a further phase shift from the filter but the waveforms look OK which is confirmed by the FFT results.
Green is the input voltage
Blue is the amplifier output with a 100K load in parallel with the filter
Red is the output of the filter which looks pretty clean

I've included the model statement from Bordodynov's library which you can find at
http://Bordodynov.ltwiki.org
Download the 16 M file and merge it with the installed libraries in your Documents folder if you want to try it.

1625520012736.png
 

Audioguru again

Joined Oct 21, 2019
6,674
The gate of the Mosfet is biased at 0V by the gate resistor to ground and by the signal generator that is also connected to ground. It will be the same with a coupling capacitor.

The 51 ohms load and 1.2k collector form a voltage divider that reduces the output level.

The Mosfet has no negative feedback so it distorts similar to an ordinary bipolar transistor that distorts like this:
 

Attachments

Thread Starter

DaniKowa

Joined Sep 23, 2020
218
Already use that library and I had compared my .jft library with the one just downloaded from the site to understand eventual difference and the file .model is the same in both library. Furthermore, i've recalculated R1 and R2 respectively 2k5 and 600ohm (eventually divided in two resistors like described above). This for 12Volt supply. Third and fourth stage haves the The third and fourth stage still has the same problem that I can partially compensate for this distortion but not completely. Considering that I have a 12 volt supply I would have expected less different behavior on this fet.
 

Thread Starter

DaniKowa

Joined Sep 23, 2020
218
I think you might have a problem.
I see the phase shift from the amplifer and a further phase shift from the filter but the waveforms look OK which is confirmed by the FFT results.
Green is the input voltage
Blue is the amplifier output with a 100K load in parallel with the filter
Red is the output of the filter which looks pretty clean

I've included the model statement from Bordodynov's library which you can find at
http://Bordodynov.ltwiki.org
Download the 16 M file and merge it with the installed libraries in your Documents folder if you want to try it.

View attachment 242765
Already use that library and I had compared my .jft library with the one just downloaded from the site to understand eventual difference and the file .model is the same in both library. Furthermore, i've recalculated R1 and R2 respectively 2k5 and 600ohm (eventually divided in two resistors like described above). This for 12Volt supply. Third and fourth stage haves the The third and fourth stage still has the same problem that I can partially compensate for this distortion but not completely. Considering that I have a 12 volt supply I would have expected less different behavior on this fet.
 

Papabravo

Joined Feb 24, 2006
21,159
I guess that leaves simulator settings. I have noticed that when changing simulator settings the results are not necessarily identical or even close. This happens mostly in switching circuits with fast edges, and not so much in amplifier circuits.
 

Thread Starter

DaniKowa

Joined Sep 23, 2020
218
Maybe @Papabravo . Actually i use a default setting for spice option. Another question i would to ask: Can obtain any improvement to supply from to dual supply (like +12 and -12) substituting the GND to negative supply?. Thanks!
 

crutschow

Joined Mar 14, 2008
34,285
Can obtain any improvement to supply from to dual supply (like +12 and -12) substituting the GND to negative supply?
Yes.
Reducing the peak signal voltages with respect to the supply voltages will tend to reduce the distortion (for example there looks to be some compression distortion at the bottom of you original waveform).

You will, of course, need to AC (capacitor) couple the input to keep the proper transistor bias.
 
Last edited:

Thread Starter

DaniKowa

Joined Sep 23, 2020
218
Try it with much lower level input signal.
Yes, reducing the input signal, the wave become normal. I'm try to lower the gain in the last stage.


Yes.
Reducing the peak signal voltages with respect to the supply voltages will tend to reduce the distortion (for example there looks to be some compression distortion at the bottom of you original waveform).

You will, of course, need to AC (capacitor) couple the input to keep the proper transistor bias.
Could I put a calculated ground resistor to lower the input signal?

Thank you all!
 
Top