IR2110 test for driving MOSFET

Thread Starter

Lavanya.R

Joined Dec 9, 2014
17
Hi all,

I want to use IR2110 for driving two MOSFETs (IRFP22N60K) & I connected it with mosfet like this:
i fed the Hin pin with noninverting PWM signal, and inverting PWM signal for Lin pin generated by 555 timer.
For bootstrap capacitor, i use 470nF ceramic cap and 1N4148 diode between pin 3 & pin 6.
But the problem is The mosfets are not working as switch.

Help me out with solution.
Thanks in advance
 

Attachments

Hypatia's Protege

Joined Mar 1, 2015
3,228
Hi all,

I want to use IR2110 for driving two MOSFETs (IRFP22N60K) & I connected it with mosfet like this:
i fed the Hin pin with noninverting PWM signal, and inverting PWM signal for Lin pin generated by 555 timer.
For bootstrap capacitor, i use 470nF ceramic cap and 1N4148 diode between pin 3 & pin 6.
But the problem is The mosfets are not working as switch.

Help me out with solution.
Thanks in advance
Regarding the imaged HLSD circuit: Absent implementation of a 'phase relation' scheme the 'totem pole' will exhibit a significant 'clash angle' --- For the (vast) majority of applications obviation of the complexities attendant to a 'relator' may be realized via insertion of the load between the source of Qhigh and drain of Qlow

Regarding the variable D/C generator circuit (IC1) good design will implement a fixed 'discharge' pull-up (specifically: the 'discharge' pull-up should be connected directly to the discharge line (pin 7) as opposed to the right end of the timing/duty-cycle potentiometer)

Best regards
HP

PS please know that the above comments are based upon a rather cursory examination of the circuit -- further irregularities may exist...

*** Edited for perspicuity Mar/13/2015 ***
 
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Thread Starter

Lavanya.R

Joined Dec 9, 2014
17
Regarding the imaged HLSD circuit: Absent implementation of a 'phase relation' scheme the 'totem pole' will exhibit a significant 'clash angle' --- For the (vast) majority of applications obviation of the complexities attendant to a 'relator' may be realized via insertion of the load between the source of Qhigh and drain of Qlow

Regarding the variable D/C generator circuit (IC1) good design will implement a fixed 'discharge' pull-up (specifically: the 'discharge' pin should be connected directly to the 1K resistor -- as opposed to the potentiometer's wiper)

Best regards
HP

PS please know that the above comments are based upon a rather cursory examination of the circuit -- further irregularities may exist...
Thanks for your replies..
But Im very new to designing of circuits.
Can you pls elaborate the above and give me some hints so that my circuit works as variable Dc generator

Thanks in advance:):):)
 

Hypatia's Protege

Joined Mar 1, 2015
3,228
Thanks for your replies..
But Im very new to designing of circuits.
Can you pls elaborate the above and give me some hints so that my circuit works as variable Dc generator

Thanks in advance:):):)
1) Effect the recommended changes to the variable duty-cycle multivibrator (IC1) -- Specifically: connect the p/u resistor directly to the 'discharge' line (Pin 7) (As shown it is incorrectly connected to the right end of the timing/duty-cycle control potentiometer)

2) 'Break' the connection from the source of Q[high] to the drain of Q[low] then insert the load 'between' said points. Appropriate 'arrangement' of the snubbing network, will, of course, be required...

Note: It may be advisable to test the MOSFETs inasmuch as the present circuit is abusive to them...

Best regards
HP

***Edited for perspicuity Mar/13/15***
 
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Thread Starter

Lavanya.R

Joined Dec 9, 2014
17
1) Effect the recommended changes to the variable duty-cycle multivibrator (IC1) -- Specifically: Connect the discharge lead (Pin 7) directly to the pull-up resistor. (As shown it is incorrectly connected to the wiper of the timing/duty-cycle control potentiometer)

2) 'Break' the connection from the source of Q[high] to the drain of Q[low] then insert the load 'between' said points. Appropriate 'arrangement' of the snubbing network, will, of course, be required...

Note: It may be advisable to test the MOSFETs inasmuch as the present circuit is abusive to them...

Best regards
HP
Thanks for ur reply... but sorry to ask you, to which 1K resistor the discharge lead should be connected, either to one connected to diode or the one connected to VCC. Also pls explain how does a snubber circuit works?
 
Thanks for ur reply... but sorry to ask you, to which 1K resistor the discharge lead should be connected, either to one connected to diode or the one connected to VCC. Also pls explain how does a snubber circuit works?
Re: the circuit of IC1:

Ok, instead of a 'kludge' here and a 'patch' there let's assemble a proper variable D/C multivibrator from the 'get go' :)

Note: in the following, relative directions/positions (i.e. left, right and inflections thereof) refer to component positions on the posted schematic.

First off let's 'clear the slate':
-Disconnect and remove the 1k resistor presently connected from pin 8 to the 100k Pot
-Disconnect and remove The 100k Pot
-Disconnect and remove the resistor at the cathode of the leftmost 1n4148.
-Disconnect the line from pin 7

Now perform the following.
1) Connect the cathode of the left-most 1n4148 directly to one ‘end’ of the 100k Pot (sans the formerly connected cathode resistor)
2) Connect the anode of the right-most 1n4148 directly to the other ‘end’ of the 100k Pot.
3) Connect pin 7 directly to the wiper of the 100k Pot
4) Connect a 1k resistor from pin 8(Vcc) to pin 7(discharge)

Note: at this juncture it is expected that you should have a 'left over' resistor :)

The circuit of IC1, as modified above, now constitutes a proper fixed frequency, variable duty-cycle M.V. (d/c adjustable from < 3% to >97%) Frequency may be determined via appropriate timing capacitor selection.

Quantitatively:
Th=Ct*[Rtc+Rp]*ln(2)
Tl=Ct*Rtd*ln(2)
And, of course, F=1/(Th+Tl)

Where:
Th=High (aka "mark") interval
Tl=Low (aka "space") interval
Ct=the capacitance of the timing capacitor
Rtc=the resistance intervening the wiper (of the 100k Pot) and the anode of the right-most 1n4148
Rtd = the resistance intervening the wiper of the 100k pot and the cathode of the left-most 1n4148
Rp=the resistance of the 'discharge OC' pull-up (in this instance 1k)

how does a snubber circuit works?
A snubber is a 'network' of reactors, resistors and diodes (electrically) incorporated into the load to the end of mitigation of switching device stress owed to (Delta I)/(Delta T) transient effects and (in the case of non-dissipative arrangements) 're-cycling' of said transient energy...

Many sincere apologies should I seem to have 'dumbed' this down -- howbeit you stated you were new to electrical engineering and I get the feeling that (at this point) you prefer practical advice to theory/lessons/lectures --- absolutely no 'slight' or condescension intended! :)

Best regards
HP

PS having reviewed my previous posts on this thread (i.e. posts Nos 4 and 8) I realize that my terse, microscopic - indeed, even 'myopic' treatment of the circuit of ic1 introduced significant liability to misinterpretation -- you need only compare the (now) amended posts with citations thereof to see just how 'significant'! :oops:)

Point being please don't be confused by seeming contradictions/incongruities
between this and my previous posts --- I assure you this post is 'fresh perspective friendly' :)
 
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Thread Starter

Lavanya.R

Joined Dec 9, 2014
17
Re: the circuit of IC1:

Ok, instead of a 'kludge' here and a 'patch' there let's assemble a proper variable D/C multivibrator from the 'get go' :)

Note: in the following, relative directions/positions (i.e. left, right and inflections thereof) refer to component positions on the posted schematic.

First off let's 'clear the slate':
-Disconnect and remove the 1k resistor presently connected from pin 8 to the 100k Pot
-Disconnect and remove The 100k Pot
-Disconnect and remove the resistor at the cathode of the leftmost 1n4148.
-Disconnect the line from pin 7

Now perform the following.
1) Connect the cathode of the left-most 1n4148 directly to one ‘end’ of the 100k Pot (sans the formerly connected cathode resistor)
2) Connect the anode of the right-most 1n4148 directly to the other ‘end’ of the 100k Pot.
3) Connect pin 7 directly to the wiper of the 100k Pot
4) Connect a 1k resistor from pin 8(Vcc) to pin 7(discharge)

Note: at this juncture it is expected that you should have a 'left over' resistor :)

The circuit of IC1, as modified above, now constitutes a proper fixed frequency, variable duty-cycle M.V. (d/c adjustable from < 3% to >97%) Frequency may be determined via appropriate timing capacitor selection.

Quantitatively:
Th=Ct*[Rtc+Rp]*ln(2)
Tl=Ct*Rtd*ln(2)
And, of course, F=1/(Th+Tl)

Where:
Th=High (aka "mark") interval
Tl=Low (aka "space") interval
Ct=the capacitance of the timing capacitor
Rtc=the resistance intervening the wiper (of the 100k Pot) and the anode of the right-most 1n4148
Rtd = the resistance intervening the wiper of the 100k pot and the cathode of the left-most 1n4148
Rp=the resistance of the 'discharge OC' pull-up (in this instance 1k)



A snubber is a 'network' of reactors, resistors and diodes (electrically) incorporated into the load to the end of mitigation of switching device stress owed to (Delta I)/(Delta T) transient effects and (in the case of non-dissipative arrangements) 're-cycling' of said transient energy...

Many sincere apologies should I seem to have 'dumbed' this down -- howbeit you stated you were new to electrical engineering and I get the feeling that (at this point) you prefer practical advice to theory/lessons/lectures --- absolutely no 'slight' or condescension intended! :)

Best regards
HP

PS having reviewed my previous posts on this thread (i.e. posts Nos 4 and 8) I realize that my terse, microscopic - indeed, even 'myopic' treatment of the circuit of ic1 introduced significant liability to misinterpretation -- you need only compare the (now) amended posts with citations thereof to see just how 'significant'! :oops:)

Point being please don't be confused by seeming contradictions/incongruities
between this and my previous posts --- I assure you this post is 'fresh perspective friendly' :)

Thanks a lot for your reply. Based on your inputs. I modified my circuit and the same is attached.
Is 1N4148 is suitable as Bootstrapping diode?
Can we short VSS and COM of IR2110? As COM is Floating vtg return path and VSS is +5V return path.
is there any electronic circuit simulation software for verifying the circuit.

Thanks in advance..
 

Attachments

Based on your inputs. I modified my circuit and the same is attached.
-The circuit of IC1 is now shown correctly :)

-While, generally speaking, the 'switch output' configuration, as shown, is now 'standard' for the IR2110 (to the extent that the load circuit intervenes the Source of Q[high] and the Drain of Q[Low]) please be advised that the snubber must be specifically designed for the load...

EDIT: Upon further examination of the attached schematic it looks as if you're grounding the drain of Q[Low]!? If so please be alerted to said error! --- Apologies for pointing up an (obvious) typo (sketch-o?;)) Tis merely OCD (and want of meds therefor) speakingo_O

Can we short VSS and COM of IR2110? As COM is Floating vtg return path and VSS is +5V return path.
In general, good design favors PWM (i.e. 'logic') vs. Switch (cip 'low side') 'ground' dichotomy... (For a less general response I require knowledge of the load)

Is 1N4148 is suitable as Bootstrapping diode
Upon cursory consideration, it would seem so... (Says I tremulously):confused:

is there any electronic circuit simulation software for verifying the circuit.
Yes, however that is a very simple circuit and those parts don't cost that much!:D -- If I had a dollar for every time 'Orcad', 'Spice', et al. let me down... :rolleyes: --- Seriously, simulators are indispensable tools, howbeit no substitute for reality... (especially where, as in this case, 'reality' is practical:)...)

Best regards
HP
 
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Thread Starter

Lavanya.R

Joined Dec 9, 2014
17
-The circuit of IC1 is now shown correctly :)

-While, generally speaking, the 'switch output' configuration, as shown, is now 'standard' for the IR2110 (to the extent that the load circuit intervenes the Source of Q[high] and the Drain of Q[Low]) please be advised that the snubber must be specifically designed for the load...

EDIT: Upon further examination of the attached schematic it looks as if you're grounding the drain of Q[Low]!? If so please be alerted to said error! --- Apologies for pointing up an (obvious) typo (sketch-o?;)) Tis merely OCD (and want of meds therefor) speakingo_O


In general, good design favors PWM (i.e. 'logic') vs. Switch (cip 'low side') 'ground' dichotomy... (For a less general response I require knowledge of the load)



Upon cursory consideration, it would seem so... (Says I tremulously):confused:


Yes, however that is a very simple circuit and those parts don't cost that much!:D -- If I had a dollar for every time 'Orcad', 'Spice', et al. let me down... :rolleyes: --- Seriously, simulators are indispensable tools, howbeit no substitute for reality... (especially where, as in this case, 'reality' is practical:)...)

Best regards
HP
this variable DC generator drives an electromagnet as load
 

Thread Starter

Lavanya.R

Joined Dec 9, 2014
17
Pls refer this schematic .
The MOSFET and remaining components on right most side as same as my previous circuit.
this is the configuration I get in so many buck converters, but how disconnecting source and drain will produce variable DC?
 

Attachments

Pls refer this schematic .
The MOSFET and remaining components on right most side as same as my previous circuit.
this is the configuration I get in so many buck converters, but how disconnecting source and drain will produce variable DC?
Ok let's be clear on one point: My reference to the circuit as a "variable d/c drive" was descriptive of a variable duty cycle drive --- as opposed to a variable direct current drive...

Re: the attached circuit --- I'm bound to say I'd like it much better did it represent 1/2 of an 'H' bridge... (Assuming appropriate input phasing)

Re: the circuit of IC2 -- Again, good design (in avoidance of troublesome skew, instability and noise) will not implement a (logic) inverter with a 555!!! :mad:

An operational configuration of the (attached) circuit will require critically designed (external) 'flywheel' circuitry (i.e. that circuitry depicted by the series inductor and shunt capacitor in the simplified diagram) -- independent variables being, principally, load impedance and switching frequency... While your stated application (driving a highly reactive {cip. inductive} load) may be amenable to such a scheme, I must confess to no little dubiety as regards its overall merit...

Well -- You're gonna do what you're gonna do!:D --- Please let us know should you require further help or advice!:)

Good luck!
Best regards
HP
 
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Thread Starter

Lavanya.R

Joined Dec 9, 2014
17
Ok let's be clear on one point: My reference to the circuit as a "variable d/c drive" was descriptive of a variable duty cycle drive --- as opposed to a variable direct current drive...

Re: the attached circuit --- I'm bound to say I'd like it much better did it represent 1/2 of an 'H' bridge... (Assuming appropriate input phasing)

Re: the circuit of IC2 -- Again, good design (in avoidance of troublesome skew, instability and noise) will not implement a (logic) inverter with a 555!!! :mad:

An operational configuration of the (attached) circuit will require critically designed (external) 'flywheel' circuitry (i.e. that circuitry depicted by the series inductor and shunt capacitor in the simplified diagram) -- independent variables being, principally, load impedance and switching frequency... While your stated application (driving a highly reactive {cip. inductive} load) may be amenable to such a scheme, I must confess to no little dubiety as regards its overall merit...

Well -- You're gonna do what you're gonna do!:D --- Please let us know should you require further help or advice!:)

Good luck!
Best regards
HP

Hi,
Today I faced a problem while testing the circuit. I supplied power to IR2110 IC, +5V from 7805 regulator to pin 9, VDD.
+15V from power supply to pin 3, VCC as per attached.
The problem the IC is heating . Pls help
 

Attachments

MaxHeadRoom

Joined Jul 18, 2013
28,619
Is this with just the power supplied as shown?
If so there should be no current through the IC. Sounds like it may be shorted?
Also did you confirm where Vo results in or ends up?
Max.
 
Hi,
Today I faced a problem while testing the circuit. I supplied power to IR2110 IC, +5V from 7805 regulator to pin 9, VDD.
+15V from power supply to pin 3, VCC as per attached.
The problem the IC is heating . Pls help

Note: The following assumes that the 'overheating IC' is the PWM (i.e. the IR2110) -- If not, please advise...

I'm bound to say it would have come as no surprise had you reported overheating MOSFETs -- A 'toasty' PWM driver, however, is a bit of a 'twist' ;)

FWIW -- At 'first blush' incorrect connection, a malfunctioning or misapplied PS, oscillatory PWM condition, a damaged (or otherwise defective) PWM or even a shorted/leaky MOSFET gate seem probable etiologies...

Please note that while I am quite dubious regarding establishment of a common load and logic ground (cip Vss to COM connection) and, frankly, appalled at the use of an lm555 circuit as a logic inverter (Re: IC2) neither of these potential missteps are likely cause of your present difficulty and, hence, will be 'given a miss' for the nonce...

So....

Please preform the following procedure then report the results...

1) Does the PWM overheat with the VCC (15v) supply disconnected?
If 'no' please skip steps 2 & 3...

-- Reconnect VCC ---
2) Adjust IC1 for minimum duty cycle --- Does the PWM overheat?
3) Adjust IC1 for maximum duty cycle --- Does the PWM overheat?

Additionally, please measure the period (or frequency) of the exciting signal at the output of IC1 --- Note: A 'scope' is preferred! If, however, you will be using a frequency counter, be advised that best results will be obtained via setting IC1 for a 50% d/c (i.e. the 100k Pot. at approximately mid-range)... Also please verify IC2's output...

Again, please report your findings :)
Best regards
HP
 
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