Hello,
After reading all posts on this subject and implementing the solution on my circuit, still, the IR2110 is getting hot. Please see my circuit amd advice me where I am wrong?
Many Thanks for your help.

 

Hello,

The Vs output of the IR2110 should go to the source of the top fet:



Bertus

 

Hello,
After reading all posts on this subject and implementing the solution on my circuit, still, the IR2110 is getting hot. Please see my circuit amd advice me where I am wrong?
Many Thanks for your help.View attachment 154448

As Bertus said, Vs to source of high side fet, also 3v3com and 15Vcom must also be connected as the 2110 can tolerate very little difference between them. Depending on your switching speed, the UF4007 might be a bit slow. A schottky might be better although the junction capacitance might be an issue with that. A small series resistor (around 10R) can help and also reduces electrical noise as a side benefit. A pulse withstanding type for best reliability but beware what some manufacturers claim to be pulse withstanding. Some seem to think pulse handling up to but not beyond normal power rating means pulse withstanding.
Your bootstrap cap (22uF2) needs to be low ESR / low ESL to avoid glitching on the gate or sag during the switch transitions and both 22uF caps need a reasonable ripple current rating which should be automatic for low ESR types anyway.
I think Bertus may have nailed your immediate issue though. Well spotted!
I would add that the drain of the lower fet and the source of the upper fet should be closely coupled to avoid issues. The lower fet is responsible for completing the circuit to charge the bootstrap cap. Any voltage difference comes off the bootstrap supply directly and may cause undervoltage lockout circuits to trip.

 

Shouldn't Q5 source be grounded?

 

Hello,

Shouldn't Q5 source be grounded?

Also a good catch.

Bertus

 

It appears to me that the high and low side drivers are essentially being used independently. This is OK, but there are some issues that must be considered.

If TEC means thermo-electric cooler, it would seem to me unlikely that the switching frequency greater than a few kilohertz. If that is the case, the diodes across the gate resistors are not worth the bother. In fact, reducing the switching slew rate is probably desirable if the connections to the TEC are made by wires. Fast switching just produces RFI. At low switching frequency, moderately high switching loss is preferable to generating RFI. It may actually be better not only to omit the diodes but to increase the value of the series resistors.

VS must connect to TEC+. Provided that whatever is connected to TEC+ is capable of sinking a little current to 15COM to within 5 volts or less of 15COM when Q6 is off, and provided that the duty cycle of Q6 is low enough to allow replenishing the charge on the bootstrap capacitor the high side driver should work. It is not clear to me these conditions will be met.

When using ultrafast recovery diodes, don't just blindly use the highest voltage available unless it is necessary. There is invariably a reverse recovery time penalty for the higher voltage parts.

 

Shouldn't Q5 source be grounded?

D'Oh!
LOL. Yes, that too! Another well spotted oops.
OP: you are getting some excellent value here. Please post back your success story when it works better than a bought one, eh

 

It appears to me that the high and low side drivers are essentially being used independently. This is OK, but there are some issues that must be considered.

If TEC means thermo-electric cooler, it would seem to me unlikely that the switching frequency greater than a few kilohertz. If that is the case, the diodes across the gate resistors are not worth the bother. In fact, reducing the switching slew rate is probably desirable if the connections to the TEC are made by wires. Fast switching just produces RFI. At low switching frequency, moderately high switching loss is preferable to generating RFI. It may actually be better not only to omit the diodes but to increase the value of the series resistors.

VS must connect to TEC+. Provided that whatever is connected to TEC+ is capable of sinking a little current to 15COM to within 5 volts or less of 15COM when Q6 is off, and provided that the duty cycle of Q6 is low enough to allow replenishing the charge on the bootstrap capacitor the high side driver should work. It is not clear to me these conditions will be met.

When using ultrafast recovery diodes, don't just blindly use the highest voltage available unless it is necessary. There is invariably a reverse recovery time penalty for the higher voltage parts.

Reverse recovery time is not so voltage dependent with the UF400x series parts from most manufacturers. They all tend to be around 150ns (from memory). I agree too with the slowing the transitions and combined with the lower switching frequency the reverse recovery time will be less of an issue as well.
If the load is a TEC though, why bother with a 2 phase or push pull drive? Why not just use a low side drive?

 

"Reverse recovery time is not so voltage dependent with the UF400x series parts from most manufacturers."

Not true. Read the Vishay, ON, MCC, Comchip and Taiwan Semi datasheets. The lower voltage parts are uniformly 50 ns trr and the higher voltage parts are 75 ns.

 

Many Thanks to all of you for your help. I am currently in PTO and as soon as I return to the office I will implement all your suggestions.
I used this circuit for controlling TEC (thermo-electric cooler) and heatsink fan. I am using the PSoC to generate 400Hz PWM and use pot (connected to PSoC) to adjust the Bandwidth.

After I build the circuit per above suggestion, if the circuit works fine, I will post the update of the schematic and write a summary of the consideration per feedback I received in this thread.

Thank you again to all of you.

 

Many Thanks to all of you for your help. I am currently in PTO and as soon as I return to the office I will implement all your suggestions.
I used this circuit for controlling TEC (thermo-electric cooler) and heatsink fan. I am using the PSoC to generate 400Hz PWM and use pot (connected to PSoC) to adjust the Bandwidth.

After I build the circuit per above suggestion, if the circuit works fine, I will post the update of the schematic and write a summary of the consideration per feedback I received in this thread.

Thank you again to all of you.

You are welcome. Looking forward to your update.