Increase in DC-link voltage of Voltage source inverter

Thread Starter


Joined Sep 12, 2020
I am trying to simulate SPWM based VSI of 100KVA (with LCL filter for sinusoidal output) which is feeding the grid at full load condition. whenever I disconnect the load (full loading condition) suddenly, the DC-link voltage tends to rise dangerously which creates stress on the DC-link capacitors. Under light load conditions, the rise in voltage is not so great. why does this rise happen in the first place and why is it greater in full load condition happen? please suggest methods to protect the capacitors from overloading without compromising efficiency.


Joined Aug 27, 2009
The DC-link capacitors store energy (smoothing ripples) circulating (phase currents) in the inverter switching section and transfer some of that stored energy to the load. The instantaneous stored reactive energy is related to the amount of real energy transferred. If that flow of energy to the load is disconnected in an instant what do you thing will happen to the reactive energy at X impedance when that impedance changes? The electrical energy will transform (EM fields) the voltage part of the product to the changing impedance to keep the energy at close to the same level. Higher load -> more energy -> greater voltage rise. So your DC-link capacitor voltage typically rises during a load disconnect until circuit losses dissipate the excess stored energy. How 'real' the level of voltage rise seen in your simulation to reality is an unknown due to a total lack of details.

The first countermeasure is to use quality parts with a good margin of performance ratings.

You could also design a DC-link dump resistance circuit to activate under load-dump conditions.

Some background on Bus or Link capacitor function and design.
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