Hello!

I have a decent budget for this project so any substantial constructive help that will lead to a working design will be rewarded.

I'm trying to connect 15 or 16 IC in series to power them directly from 12V. Each IC needs 0.75 - 0.9 V (140Amperes max), 3.3V (0.5A max), 1.8V (0.2A max).

I know it is not a standard idea but other similar IC have been seen working this way therefore I want to try to make my IC work as well.

BOM cost is not a major concern.


As I see it there are several problems that I need to solve in order to get it to work:

1. Communication:

All these IC communicate via SPI (2Mhz) with a microcontroller (powered from 3V3 & real GND).

As the SPI signals of each chip will not 3v3 and 0v when related to the real GND, (Eg. IC 1 will generate SPI signals between 14.5V and 11.2v) we need to transform the signals so they can be read both ways (MCU and IC)

I was thinking to use ADUM 7440/1400 but it has 2 issues:
a. it will pull down when not active therefore the generated signal towards the MCU will be pulled up by 1 ADUM7440 and pulled down by all the rest.
b. i've never tested it if it would work in such a setup and the datasheet is not clear to me.

2. As a failsafe I want to use the same microcontroller to monitor the voltage of each IC. Should any of the IC voltage exit the valid range, it will need to reset all of them in order to restore the correct resistance.

3. I'm not very clear yet how to generate all power ranges required for this setup. Clearly each IC has it's own 0.8V vcore, but 1.8v and 3.3v also need to be generated. I'm thinking that for chips in the lower part of the string we can use 3.3 and 1.8v from taken from VCC core of higher chips, we will need a boost up converter for first 3 IC.
How would you see this done?

Thank you.
Regards!

 

I dont understand why you would want to go through all this? Why not have them in parallel and solve about 100 complications that way?

You could theoretically use a shunt regulator to get 3.3V for each set of ICs and use standard regs to get the rest of voltages for each chip, but you will have lots of trouble getting the SPI to work. You might need to either optocouple it or use some form of AC coupling or current signalling.

 

There are 2 reasons:

1. The bill of materials + PCB space to get these running at 0.8V, makes it very expensive. I need 4 x 40A DRMOS + 1 controller + 4 50A inductors + a lot of capacitors to get this power to the chip.

2. The efficiency of using swiching power supply is 80-85%

P.S: I already have the solution in parallel working. I need it to lower the BOM now.

 

So that 140A you´ve written up there is not an error? What are those things and why do they need that much current? Is the current constant or does it vary?

Also do you realize that linear regulators are way less efficient than switched ones?

 

So that 140A you´ve written up there is not an error? What are those things and why do they need that much current?

140A is correct. They are 28nm ASICs.

Is the current constant or does it vary?

It should not vary if the workload is carefully controlled by software. However, I need the failsafe voltage monitoring in order to make sure that I don't burn them.

Also do you realize that linear regulators are way less efficient than switched ones?

I do. However, the LDO is only there to output 3.3V or 1.8V which is digital I/O (max 0.5A). My idea would be, with careful designed schematics to arrange it to drop from 4-5V to 3.3V and from 2-3V to 1.8V. Using swiching regulator for this low drop would mean to use at least an extra inductor and generate a noisier power for ASIC's PLL.

As I mentioned, for chips in the range of 9V and lower we can use the VCC Core from other ASICs as 3.3V and 1.8V therefore having 100% efficiency.

Regards!

 

As I mentioned, for chips in the range of 9V and lower we can use the VCC Core from other ASICs as 3.3V and 1.8V therefore having 100% efficiency.Regards!

Not sure what you mean by that statement, and even less about the efficiency.

Welcome to the real world, you are asking almost 1800W just from the core supplies, so be prepared that you will dissipate at least 200W in the voltage regulation.

I can imagine having all the 0.8V rails in series, with a linear shunt regulator accross each rail to maintain balance and prevent overvoltage on the chips. I can also imagine regulating the 1.8 and 3.3 rails from the upper parts in the chain.

Now for the noise issue you mentioned, I think this soultion would be even worse than a switching reg with proper filtration, as the current spikes from each asic will be seen in all the others.

Also you said in the first post that you dont care about the BOM cost, now you say you want it cheaper than the standard solution. Are you prepared to toast a few of those asics in order to get this contraption working? I doubt it will work flawlessly on the first try.

And then there is the communication issue, is the SPI the only thing these asics communicate over? And what is their actual purpose?

 

Not sure what you mean by that statement, and even less about the efficiency.

Which one?
Basically I do not care about 3.3V and 1.8V efficiency as the power is low.

Welcome to the real world, you are asking almost 1800W just from the core supplies, so be prepared that you will dissipate at least 200W in the voltage regulation.

I am prepared for that. I have already completed and manufactured the PCBs using mosfets.

I can imagine having all the 0.8V rails in series, with a linear shunt regulator accross each rail to maintain balance and prevent overvoltage on the chips.

I've never used a linear shunt regulator but from what I googled it looks to me that it will have to dissipate 140A. I'm not sure that is doable. I'm looking here to improve the efficiency and I'm not sure if such part will help.

I'm thinking that the best way would be in case of emergency to reset the ASICs which will get them to idle (5 Watt leakage, same resistance)

I can also imagine regulating the 1.8 and 3.3 rails from the upper parts in the chain.

Now for the noise issue you mentioned, I think this soultion would be even worse than a switching reg with proper filtration, as the current spikes from each asic will be seen in all the others.

I agree with this; Maybe is not such a great idea after all and I need to use 2 LDO for each ASIC. I have not decided if I should use 1 x RT8020 or 2 x AMS1117.

Also you said in the first post that you dont care about the BOM cost, now you say you want it cheaper than the standard solution.

Power efficiency is very important therefore saving those 200-300Watt is very desirable.
What I meant to say by don't care about the cost of the BOM was that I am open to use an IC to convert the SPI levels if we cannot make a voltage divider. I'm not sure if a level shifter circuit would be good for this application.

Are you prepared to toast a few of those asics in order to get this contraption working? I doubt it will work flawlessly on the first try.

No problem. I have many.

And then there is the communication issue, is the SPI the only thing these asics communicate over? And what is their actual purpose?

Yes, they communicate only over SPI. There's a interrupt pin as well in which they announce that there's data to be read via SPI.

The actual purpose for these ASICs is Bitcoin mining.

 

I've never used a linear shunt regulator but from what I googled it looks to me that it will have to dissipate 140A. I'm not sure that is doable. I'm looking here to improve the efficiency and I'm not sure if such part will help.

Say one of the asics draws 150A and the others draw only 140A. Then the shunt regs divert that 10A difference around each of the remaining asics in order to maintain the 0.8V core voltage for each one. However it will have dissipate the full 140A at 0.8V if the asic shuts down. That means that if you can keep them well balanced then the dissipation will be minimal.

What will be the main power supply for this?

 

Say one of the asics draws 150A and the others draw only 140A. Then the shunt regs divert that 10A difference around each of the remaining asics in order to maintain the 0.8V core voltage for each one. However it will have dissipate the full 140A at 0.8V if the asic shuts down. That means that if you can keep them well balanced then the dissipation will be minimal.

I see. Sounds good. Can you recommend a part number and make a draft schematics for this?

What will be the main power supply for this?

140A 12V Swiching PSU.

 

something along these lines http://www.x-relsemi.com/design/IMGS/schematic_collections/XTR431_High-current_Shunt_Regulator.jpg , but the shunt reference needs to be able to work with 0.8V. Also Rlim2 will need to be connected to one of the upper reg rails to get proper Vgs for the mosfet to turn on.

 

something along these lines http://www.x-relsemi.com/design/IMGS/schematic_collections/XTR431_High-current_Shunt_Regulator.jpg , but the shunt reference needs to be able to work with 0.8V. Also Rlim2 will need to be connected to one of the upper reg rails to get proper Vgs for the mosfet to turn on.

It is not clear to me how to make these schematics and what parts to use.

 

Can anybody tell me how to design this circuit?

 

I did some simulations, and it doesnt seem like it is very doable. I might fiddle with it a bit more if i get the time.

 

0.75v at 140A wont be easy. You need thick conductors.

140A for each IC or all of them together?

It would be helpful to show some pictures or it's too foggy.

Also the main problem when you connect them in series is that the voltage wont divide evenly if the consumption is not evenly distributed.

The ICs will have different resistances.

Divide 0.75v by 140 Amps.

You get about 50 milli Ohms.

You can think of the cables used to supply welding electrodes. How do you connect them to the IC? That is very doubtful to me.

also even if a MOSFET has 10 milli Ohms and a surge current capability of 50 Amps, it does NOT mean it can conduct 50 Amps all the time.

In reality even 10 Amps are difficult.

10 Amps cause a thick cable to heat up, they cause large capacitors to heat up.

 

0.75v at 140A wont be easy. You need thick conductors.

140A for each IC or all of them together?

If they are in series is one and the same.

It would be helpful to show some pictures or it's too foggy.

Also the main problem when you connect them in series is that the voltage wont divide evenly if the consumption is not evenly distributed.

I can bin them based on consumption at desired speed and ensure that they are using the same power.

The ICs will have different resistances.

Divide 0.75v by 140 Amps.

You get about 50 milli Ohms.

You can think of the cables used to supply welding electrodes. How do you connect them to the IC? That is very doubtful to me.

The distance between them is small (few mm) therefore resitance drops dramatically compared to welding electrodes

 

Does one IC draw all the current, or is there many of them? It would be much easier if you could divide the current to more 10-15A strings.

 

Does one IC draw all the current, or is there many of them? It would be much easier if you could divide the current to more 10-15A strings.

If we run at 0.63V, it will consume 50 Amperes but we'll need to put 19 chips in series. Can we do something with 50A?

 

I don't think you can do anything reasonable to regulate voltage by conventional means, but if you can regulate it by varying the load, it is the best way. See voltage increasing on one ASIC - give it more load (or decrease load on other ones). This also may be regulated by regulating ASIC's clocks. Shouldn't be hard to do.

Power consumption will also be temperature dependend and with 120W at each ASIC, you can try to do some extra regulation by varying cooling levels, but, of course, this requires lots of experiments.

Of course, if one of the ASICs suddently stops working, it'll get all the voltage, so you will have to turn off the power if something of this sort is happening. This also means that you won't be able to stop using one of the ASICs while others continue.

Starting will be a big problem. You need to find a way to make sure the load is absolutely even during startup. You may need to start slowly and increase load smoothly.

Big capacitors accross each ASIC will help to make sure that you have more time to regulate.

As to isolators, TI makes very good capacitive ones, such as ISO7221.

 

Regarding a shunt solution, I am thinking that we could put a shut to cover 2 ASICs instead of one.

Shut1: ASIC1-ASIC3
Shunt2: ASIC2- ASIC4
etc

is this possible?