Hi All,

I'm trying to understand the I2C concepts.
Have gone through documents in Wiki and others.

It's an 2-wire bus for the serial transfer / receive the data.

Can also operate as multi-master mode.
My doubt is in this operation.

Let's say:

I2C bus with M1 - Master 1 , M2 - Master 2 . S1 - Slave 1.


If two master's M1,M2 trying to send 1 byte data to same slave S1 over the I2C bus ?
Assume that both M1 , M2 start at the same time to send the data.

which master M1 or M2 will send successfully the data first to Slave S1 ?

thanks in advance.

 

It means that ,two masters M1,M2 by the same time can't send the data to same slave S1 over I2C Bus.It's possible only , if either M1 or M2 disable its communication while using the I2C bus.

Correct me if my above understanding is not correct.

How the arbitration handled in the I2C bus ?

 

It means that ,two masters M1,M2 by the same time can't send the data to same slave S1 over I2C Bus.It's possible only , if either M1 or M2 disable its communication while using the I2C bus.

Correct me if my above understanding is not correct.

How the arbitration handled in the I2C bus ?

Unlike CAN or LIN there is no arbitration. The two master devices and the slave device cannot detect the situation until one master sends a high and the other sends a low. Depending on where in the message stream this occurs the slave may think another device is being addressed and ignore everything. The two masters might send identical bits until the actual data byte and the slave device may well accept all of the data bytes that are low on either master and accept all the bits that are high on both master devices.

That is why the two master devices must coordinate their operations. From this point of view you could hardly call I2C a robust protocol.

 

"Arbitration" with I2C really is more like "Master waiting for stop condition" on the bus - it tries to drive a stop condition, but if a slave (or other master) is transmitting it won't see the stop condition (or not for long). One can download the I2C specification from NXP and implement the "MOSFET Voltage Level Shifting" circuit additions if desired - and even have one of the masters control driving the gates of the MOSFETs. This can provide effective I2C bus isolation or fault-tolerance with one master always being able to cutoff/disable the other when it needs to do so.

Like many networks, the robustness has to come from the software running in the micro(s). Multiple reads/data checking, etc.