Hello everyone,
I’m an RF engineer mostly working with passive RF components like filters, directional couplers, and so on. However, sometimes I need to build something simple using transistors.


In my current project, I need to drive a GaN RF switch with logic levels of 0 / –28 V. I’m using a Zener-diode-based level-shifting technique to invert a 28 / 0 V logic signal into 0 / –28 V. After that, I assume I need a buffer stage to decouple the level shifter from the load.


For this purpose, I picked a MOSFET DMP56D0UV with as low gate charge as I could find and built a circuit (attached as an LTSpice project). In the simulation, it works suspiciously well -- exactly how I want it to.


However, I have a few questions:

1. How much can I rely on the Zener diode to protect the MOSFET’s gate from breakdown? The datasheet gives a maximum Vgs of just 8 V.
2. Will this circuit actually work in real life, or is it doomed to fail outside simulation?
3. Are there any existing solutions that would save me from reinventing the wheel?

For example, to generate 28 / 0 V pulses, I use the IXDF604SIA driver IC. Would it be possible to invert VCC and GND, and apply a negative CMOS input signal (which is much easier to generate), and simply forget about the buffer stage? Or would that damage the chip?


Any help or insight would be greatly appreciated!

 

It does not matter much if the supply voltage is positive or negative. The switching circuit can be referenced to either polarity.

The simple solution is to use an opto-isolator. Hence the input and output pulses are isolated and can have independent references.

You have not stated the switching speed required.

 

You have not stated the switching speed required.

An order of 20 ns with a 50% duty cycle.

 

Vishay VOIH72A specification is 40 ns max.

 

Vishay VOIH72A specification is 40 ns max.

Thanks, that’s interesting -- I had no idea they could be that fast.
Unfortunately, though, they don’t meet the required switching voltage levels. The highest I’ve found is 24 V.
ACNU-250L But it is slow.

 

The optocoupler itself does not need to meet the required switching voltage levels. Use the optocoupler to do the level shifting. Then use an additional driver to meet the voltage required.

 

Sorry, but if I understand correctly (most probably -- not), this driver is basically exactly what I was asking about. Using an optocoupler, we generate logic levels like 0 / –5 V, which then need to be converted to 0 / –28 V -- I assume using the same principle, with a p-FET or a PNP BJT.


Would you please be so kind to explain your idea a bit more in detail?

 

Whether you choose PNP, NPN, P-FET or N-FET doesn't matter much.
The transistor is a switch.
Use the optocoupler to provide the required control signal on the base or gate.
Notice that I have not assigned any voltage polarity or ground. Basically, the upper rail is more positive than the lower rail.
The optocoupler can go on either side of the base, low or high, with appropriate pull-up or pull-down resistor.

 

so your signal is a square wave of some 50MHz and 28V amplitude?
for 50Mbps you could use HCPL-7723/0723
datasheet for DMP56D0UV shows built in diodes.

 

datasheet for DMP56D0UV shows built in diodes.

Then, will these diodes protect a gate-source channel from a breakdown in case, for instance, delay in switching, when gate is under -28, but source is still 0? Or vise versa.
If this is a case, then why the datasheet specifies Vgs_max as 8 V?
Sorry for silly questions.

 

i would guess that the internal zeners are 8.2V or so. therefore it would make sense to let user know to not use higher voltage. most mosfets tolerate Vgs up to some +/-20V. circuits using 9, 12, or 15V are rather common. imagine using some low impedance circuit driving gate with 12V without being aware of internal diodes. they would blow up. and then the mosfet itself would likely get damaged as well.


btw your circuit does not seem to work even in simulation. i did not bother importing the exact PMOS model that you supplied so i just replaced it with generic one... since common drain, the output does not get even close to -28V. but...for mosfet to turn on, i would expect to see some Vgs of 3..5V and the way this is connected, it never gets to 1V. then i removed mosfet from the circuit and run simulation again. as expected output is still the same.

 

btw your circuit does not seem to work even in simulation.

Well, what I see is:


Even with a generic model or any other more or less suitable MOSFET from the LTSpice library. Probably, something missing in the project: I have experienced, that when sharing, LTSpice requires absolutely everything to be put together.

So, then, can I dare to ask, what can be a solution in this case? How to buffer level shifter or how to rapidly switch minus 28 V, since this voltage exceeds Vgs(be) threshold of most of the quick MOSFETs and BJTs?

 

that looks better than i would expect since Vgs is clamped by forward biased D2. your graph shows about 0.7V which is suspicious since that is what one would expect from BJT in same configuration. the best way to test it is to build it. no simulator replaces real world.

 

the best way to test it is to build it. no simulator replaces real world.

Yes, that's true. I just wanted to clarify, if I am not doing a total mess.

I was also hoping someone might suggest how to improve the circuit.
And still -- I just can’t wrap my head around it -- the GS breakdown issue.